Flip-chip bonding by electroplated indium bump
2015 (English)Independent thesis Basic level (degree of Bachelor), 10 credits / 15 HE credits
Student thesis
Abstract [en]
In hybrid pixel detector fabrication, high-density interconnection between focal plane array and the read-out integrated circuit is important. Bump bonding is the preferable assembly method, it is small in size, low cost, high performance and flexible I/O. Flip-chip bonding is a vertical connection technique of focal plane array and top substrate with solder bumps. In this paper, Flip-chip bonding by electroplated indium bumps is described. There are advantages of using indium as the solder material. It is relatively inexpensive, it has good thermal and electrical conductivity, it is ductile, and it is cryogenically stable. Indium bumps with a diameter of 30 µm are successfully prepared by an electroplating method, however removing indium conductive layer after electrodeposition is challenging. The corresponding electroplating indium bump process is also discussed. Electrical measurement was applied to detect the connection integrity of the flip-chip assemblies.
Place, publisher, year, edition, pages
2015. , p. 33
Keywords [en]
Bumping, UMB (under bump metallization), electroplating
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:miun:diva-27178OAI: oai:DiVA.org:miun-27178DiVA, id: diva2:909008
Subject / course
Electrical Engineering ET2
Educational program
International Bachelor's Programme in Electronics TIELG 180 higher education credits
Supervisors
Examiners
2016-03-042016-03-042025-09-25Bibliographically approved