Mid Sweden University

In readout electronics for photon counting pixel detectors, the tight integration between analog and digital blocks causes the readout electronics to be sensitive to on-chip noise coupling. This noise coupling can result in faulty luminance values in grayscale X-ray images, or as color distortions in a color X-ray imaging system. An exploration of simulating noise coupling in readout circuits is presented which enables the discovery of sensitive blocks at as early a stage as possible, in order to avoid costly design iterations. The photon counting readout system has been simulated for noise coupling in order to highlight the existing problems of noise coupling in X-ray imaging systems. The simulation results suggest that on-chip noise coupling should be considered and simulated in future readout electronics systems for X-ray detectors.

We present a method, based on SystemC, for quantification of noise coupling in mixed-signal systems, called BeNoC. Presented method facilitates seamless quantification of both power-line and substrate noise coupling at behavioral level. The main contribution of this approach is the integration of noise coupling simulation with behavioral functional simulation. Starting from a behavioral model of the system, captured in SystemC, we add wrappers to each block in the behavioral model. These wrappers add an estimated power consumption model for each block, which is triggered by events in the behavioral simulation. The noise coupling simulation is then done by connecting the different blocks according to a virtual layout and technology parameters. The resulting noisy substrate or noisy power-line can then be fed back into the behavioral model. Thus, effects on the system behavior can be analyzed. In this paper we focus on noise coupling over the power-supply network and demonstrating the usability of noise coupling simulation technique. The simulation results are compared with SPICE simulations.

This paper presents methods for early quantification of digital to analog noise coupling at behavioral level. The methods enable designers to both verify the behavior of their mixed-signal architecture and its sensitivity to noise coupling. The high-level noise coupling simulation models are implemented as extensions to SystemC.

This paper presents methods for early estimation of digital to analog noise coupling over the power distribution network in mixed-signal systems. The methods allow both behavioral verification of mixed-signal architectures and their sensitivity to noise coupling of the power distribution network. The behavioral level noise coupling simulation models are implemented as extensions to the SystemC system design language. To illustrate the effectiveness of the proposed methods, we have estimated the power distribution network noise for a photon-counting X-ray pixel array and compared this with SPICE simulations.

We present methods and models to simulate substrate noise coupling at the behavioral level. The models are implemented as a part of the SystemC based Behavioral level Noise Coupling (BeNoC) simulation application. The application is designed as a wrapper to SystemC component modules, enabling designers to simulate substrate noise coupling in their modules during the entire circuit refinement process. This is enabled through the two main contributions presented in this paper: (1) methods to connect the behavioral level with low level circuit simulations and (2) generation of a fast and accurate circuit model for substrate coupling simulations. The accuracy of the generated substrate noise coupling model is verified against device simulations. The same verification test case is used to demonstrate the connection between behavioral simulations and circuit simulations.

In CMOS digital logic, there are two major noise sources requiring consideration. These are a circuit´s power supply current and its noise current injected into the substrate of the circuit. This paper proposes a method for modeling and estimating the noise current injected into the substrate by capacitive coupling in digital circuits. The simplicity of the model and the reduction of details in the technology libraries facilitates behavioral level noise coupling simulation. The model is exemplified and evaluated for a simple NOT gate test case, for which the accuracy and simplicity of the models show great promise for simulation at the behavioral level.

In modern mixed-signal system design, there are increasing problems associated with noise coupling caused by switching digital parts to sensitive analog parts. As a consequence, there is a growing necessity to understand these problems. In order to avoid costly design iterations, noise coupling simulations should be initiated as early as possible in the design chain. The problems associated with on-chip noise coupling have been discovered in photon counting pixel detector readout systems, where the level of integration of analog and digital circuits is very high on a very small area, and it would appear that these problems will continue to increase for future system designs in this field. This paper deals with the functionality of utilizing behavioral level models for simulating noise coupling in these readout systems. The methods and models are described and simulation results are shown for a photon counting pixel detector readout system.