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  • 101.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Communications in Hardware/Software Embedded Systems1997Report (Other scientific)
  • 102.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Grammar Based Modelling and Synthesis of Device Drivers and Bus Interfaces1998Book (Other scientific)
  • 103.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Hardware/Software partitioning of embedded computer systems1996Licentiate thesis, monograph (Other scientific)
    Abstract [en]

    The codesign of embedded computer systems involving hardware and software components has received lot of attention in the recent years. There are several different approaches to solve the codesign problem. The approach adopted in this thesis is to implement non time critical parts in software that is executed on some standard processor and implement the performance critical parts in hardware. This keeps the amount of self designed hardware small and thus the implementation effort low. The flexibility is kept high since a large part of the system is implemented in software. This thesis presents a hardware/software partitioning algorithm and three case studies (two from the telecommunication field and one X-windows Mandelbrot plotter) on hardware/software codesign. The partitioning algorithm is based on a knapsack stuffing algorithm which selects a partition of hardware and software which gives the highest system speed-up with the lowest gate cost. The proposed method, partition a C/C++ executable description based on several analysis results; execution profiling, hardware estimations and estimated parameter transfer times. The three case studies show results and experience from the analysis tools, partitioning tools, verification methods and prototyping environment. The case studies are: - D-AMPS Channel Decoder, channel decoder functionality in a D-AMPS cellular phone base station. - F4 model, operation and maintenance functionality of the ATM protocol. - Mandelbrot plotter, X-windows Mandelbrot set plotter.

  • 104.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    HW/SW Interface Synthesis for Effortless Reuse of IP Components1999In: 1st INTELECT Workshop, Linköping, 7-8 June 1999, 1999Conference paper (Other scientific)
  • 105.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Specification, Synthesis and Validation of Hardware/Software Interfaces1999Doctoral thesis, monograph (Other scientific)
  • 106.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    SystemC blir EDA-världens Linux2003In: Elektronik i Norden, ISSN 1103-2944, no 7, p. 26-28Article in journal (Other scientific)
    Abstract [sv]

    Sedan syntes började ersätta schemainmatning i slutet av 80-talet, har Verilog och VHDL dominerat marknaden för digitala hårdvarubeskrivande språk. I slutet av 90-talet fick både Verilog och VHDL tillägg för att modellera analoga och mixed-signal-funktioner. Båda språken har sina för- och nackdelar och man kan fråga sig om någon av dessa nackdelar motiverar ett nytt hårvarubeskrivande språk? Svaret på den frågan kommer antagligen att bli nej. Något egentligt behov av ett nytt hårdvarubeskrivande språk finns inte, men däremot ett stort behov av ett språk som stöder systemkonstruktion, SystemC.

  • 107.
    O'Nils, Mattias
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Abdalla, Munir
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Oelmann, Bengt
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Low Digital Interference Counter for Photon Counting Pixel Detectors2002In: Nuclear Instruments and Methods in Physics Research, Section A, ISSN 0168-9002, Vol. 487, no 3, p. 323-330Article in journal (Refereed)
    Abstract [en]

    Single photon-counting pixel sensors are widely used in radiation imaging because of their energy resolving capability and high dynamic range. However, the close integration of the analog and digital circuits in the small pixel area puts critical constraints on the mixed mode circuit design. This includes the design considerations regarding the noise injection from the digital circuits into the analog part due to the digital switching. In addition, the large number of components requires a pixel circuit with low power consumption. In this paper, we address these two design constraints. An event counter architecture that decreases the digital switching and power consumption in a pixel is presented. The counter has the same dynamic range for capturing events and hardware cost as the conventionally used counters. We present design rules for adopting the counter architecture to a certain application. These rules enable the trade-off between readout accuracy from the pixel vs. the current in the digital parts of the pixel. Simulation of a case study circuit shows a reduction of digital activity by a factor seven, and a significant reduction of power consumption.

  • 108.
    O'Nils, Mattias
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Jantsch, A
    Communication in hardware/software embedded Systems: A taxonomy and problem formulation1997In: Proceedings '97 / 15th NORCHIP Conference : Tallinn, 10 - 11 November 1997 / IEEE Region 8: NORCHIP Conference ; 15 (Tallinn) : 1997.11.10-11, Copenhagen: Technoconsult , 1997, p. 417-Conference paper (Refereed)
    Abstract [en]

    We formulate the problem of communication synthesis in HW/SW embedded systems by (a) investigating the required concepts at the specification level and (b) by analyzing potential communication routes in heterogeneous HW/SW architectures. Thus, we define the input and output for communication synthesis and we formulate a taxonomy for a complete classification of communication in HW/SW embedded systems.

  • 109.
    O'Nils, Mattias
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Jantsch, A.
    HW/SW Interface Validation in IP based System Design1998In: Proceedings of International Workshop on IP based Synthesis and System Design, 1998, p. 79-74Conference paper (Refereed)
    Abstract [en]

    Hardware/Software interfaces are a critical point for system simulation because the hardware and software parts are developed by separate development activities. Our multi-phase validation approach facilitates the simulation of the interfaces at several steps during development. We keep all the simulation models consistent with both the specification and the implementation by generating the models with a technique derived from interface synthesis, which enables the interface specification, simulation models, and implementation to be consistent with each other. We justify validation in several phases by (a) the up to four orders of magnitude faster simulation of early phases compared to late phases, and by (b) enable efficient and accurate validation and reuse of interfaces to IP components in embedded HW/SW systems.

  • 110.
    O'Nils, Mattias
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Jantsch, A
    Multi-phase validation of hardware/software interfaces based on generated simulation models1998In: IEEE International High Level Design Validation and Test Workshop : Sheraton Grande Torrey Pinnes, La Jolla, California, November 12 - 14, 1998; [digest of papers] / HLDVT-98: HLDVT-98, [LaJolla, Calif.]: IEEE , 1998, p. 218-Conference paper (Refereed)
    Abstract [en]

    Hardware/Software interfaces are a critical point for system simulation because the hardware and software parts are developed by separate development activities. Our multi-phase validation approach facilitates the simulation of the interfaces at several steps during development. We keep all the simulation models consistent with both the specification and the implementation by generating the models with a technique derived from interface synthesis, that enables the interface specification, simulation models, and implementation to be consistent with each other. We justify validation in several phases by (a) the up to four orders of magnitude faster simulation of early phases compared to late phases, and by (b) allowing both HW designer and SW developers to work in their familiar tool environment as long as possible.

  • 111.
    O'Nils, Mattias
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Jantsch, A.
    Operating System Sensitive Device Driver Synthesis from Implementation Independent Protocol Specification1999In: Proceedings of Design Automation and Test in Europe (DATE), 1999, p. 562-568Conference paper (Refereed)
    Abstract [en]

    We present a method for generation of the software part of a HW/SW interface (i.e. the device drivers), which separates the behaviour of the interface from the architecture dependent parts. We do this by modelling the behaviour in ProGram (a grammar based protocol specification language) and capture the processor and OS kernel parts in separate libraries. By separating the behaviour from the architectural specific parts, compared to other approaches up to 50% development time can be saved the first time the component is used, and up to 98% for each time the interfaced component is reused.

  • 112.
    O'Nils, Mattias
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Jantsch, A
    Refinement of HW/SW Communication Channels: Case Study and Comparision1998In: Proceedings 16th NORCHIP Seminar, 1998, 1998, p. 230-237Conference paper (Refereed)
    Abstract [en]

    We compare four different approaches to specification and refinement of the software parts in SW/SW communication channels with respect to design productivity. The four approaches are CoWare [12], MakeApp [7], ComSyn [8], and manual refinement. Manual refinement is still predominant in practice for most embedded systems. With this case study we hope to show its deficiencies and how it can be improved with tool support available today. The comparison is done by analysing the impact of different techniques on the design process. The analysis is based on two designs, a channel decoder of a transceiver in a D-AMPS base station and an operation and maintenance block of an ATM network. We compare the design productivity with respect to development effort, validation effort, and library maintenance effort.

  • 113.
    O'Nils, Mattias
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Jantsch, A
    Synthesis of DMA controllers from architecture independent descriptions of HW/SW communication protocols1999In: 12th international conference on VLSI design 1999 Proceedings, 1999, p. 138-145Conference paper (Refereed)
    Abstract [en]

    Starting from an architecture and implementation independent specification of hardware/software communication protocols, we present a protocol synthesis method that generates a mixed hardware and software implementation. For the hardware part, the synthesis method will generate an application specific direct memory access (DMA) controller for each protocol specification. Software parts of the generated implementation are components for initialization, synchronization and communication with the DMA controller. The protocol specification, with the grammarbased language ProGram, is used to model the HW/SW communication protocol. Since this approach is based on a device driver synthesis system for software solutions, which adopts the generated device drivers to a selected processor and kernel, the generated hardware/software solution can also be adopted to any processor and OS kernel. This lets the designer explore the design space for the communication protocols by trading off between performance and cost.

  • 114.
    O'Nils, Mattias
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Jantsch, A
    Hemani, A
    Tenhunen, H
    Interactive Hardware-Software Partitioning and Memory Allocation Based on Data Transfer Profiling1995In: International Conference on Recent Advances in Mechantronics. ICRAM '95, 14-16 Aug. 1995 , Istanbul, Turkey, 1995, p. 447-452Conference paper (Refereed)
    Abstract [en]

    This paper deals with the problems of memory allocation and partitioning in hardware/software codesign. We present two algorithms to solve these problems. First a memory allocation algorithm for minimizing memory traffic is presented. The memory allocations are performed based upon data transfer profiling information captured with an extension to the Gnu C compiler. A partitioning algorithm is then presented which is used to partition the C/C++ specification into behavioural VHDL and object code, the partitioning algorithm decisions are based upon information from memory allocation, execution profiling and hardware estimations. The partitioning process is made interactive by allowing the user to control how a specific object should be implemented. We present results from two examples: One calculating the Fibonacchi numbers and one implementing the operation and maintenance functionality of the ATM protocol. We observe that taking data transfer information into account can lead to 50% performance improvement.

  • 115.
    O’Nils, Mattias
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Jantsch, Axel
    Department of Electronics, Electronic System Design Laboratory, Royal Institute of Technology.
    Device driver and DMA controller synthesis from HW /SW communication protocol specifications2001In: Design automation for embedded systems, ISSN 0929-5585, E-ISSN 1572-8080, Vol. 6, no 2, p. 177-205Article in journal (Refereed)
    Abstract [en]

    We have separated the information required for HW /SW interface synthesis into three parts, the protocol specification, the operating system related information, and the processor related information. From these inputs a synthesis tool generates (a) device driver functions or (b) a combination of device driver functions and a DMA controller, depending on a designer’s decision. The clean separation of information facilitates (1) efficient design space exploration with combinations of different processors, operating systems and protocols, and (2) maintaining a large number of different versions and variants of HW /SW interfaces by synthesising them on demand. Protocols are specified as a grammar, which is fully independent of architecture and implementation. From this the synthesis tool generates device driver code in C and /or synthesizable RTL code in VHDL for DMA controllers. After the initial selection of implementation alternatives the presented methods are fully automated. Its computational complexity is quadratic in terms of the number of states. With real-life examples we show that the quality of the generated code is close to hand written quality in terms of performance, area and code size.

  • 116.
    O'Nils, Mattias
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Lilljefjäll, P-R.
    Thörnberg, Benny
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Data Partitioning for Parallel Implementation of Real-Time Video Processing Systems2005In: Proceedings of the 2005 European Conference on Circuit Theory and Design: vol. 1, IEEE conference proceedings, 2005, Vol. 1, p. 213-216, article id 1522948Conference paper (Refereed)
    Abstract [en]

    The main reason for using data partitioning for a video processing system is the increase in performance it offers. This paper presents a comparison of the buffering requirements for different data partitioning methods used in video processing systems. The analysis shows that the buffer storage required for the implementation of video systems is highly dependent on the partitioning strategy. The results indicate that partitioning the tasks vertically is by far the most efficient method when considering buffer sizes.

  • 117.
    O´Nils, Mattias
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Lundgren, Jan
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Oelmann, Bengt
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    A SystemC Extension for Behavioral Level Quantification of Noise-Coupling in Mixed-Signal Systems2003In: PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL III - GENERAL & NONLINEAR CIRCUITS AND SYSTEMS Vol 3, IEEE , 2003, , p. 898-901p. 898-901Conference paper (Refereed)
    Abstract [en]

    We present a method, based on SystemC, for quantification of noise coupling in mixed-signal systems, called BeNoC. Presented method facilitates seamless quantification of both power-line and substrate noise coupling at behavioral level. The main contribution of this approach is the integration of noise coupling simulation with behavioral functional simulation. Starting from a behavioral model of the system, captured in SystemC, we add wrappers to each block in the behavioral model. These wrappers add an estimated power consumption model for each block, which is triggered by events in the behavioral simulation. The noise coupling simulation is then done by connecting the different blocks according to a virtual layout and technology parameters. The resulting noisy substrate or noisy power-line can then be fed back into the behavioral model. Thus, effects on the system behavior can be analyzed. In this paper we focus on noise coupling over the power-supply network and demonstrating the usability of noise coupling simulation technique. The simulation results are compared with SPICE simulations.

  • 118.
    O'Nils, Mattias
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Norell, Håkan
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Thörnberg, Benny
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    A Comparison between Local and Global Memory Allocation for FPGA Implementation of Real-Time Video Processing Systems2004In: Proceedings of the IEEE International Conference on Signals and Electronic Systems, 2004Conference paper (Refereed)
    Abstract [en]

    This paper presents a comparison of local and global memory allocation for implementation of real-time video processing systems on FPGAs. The paper compares new methods to perform memory allocation using single and dual port block RAMs to memory allocation methods found in the literature. This investigation shows that the use of global allocation can reduce the memory size by up to 75 % for the two presented video processing systems.

  • 119.
    O'Nils, Mattias
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Oelmann, Bengt
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Using CoWare in a Course on Design of Embedded HW/SW System2000In: Proceedings of the 18th IEEE Norchip Conference, 2000Conference paper (Refereed)
    Abstract [en]

    This paper presents an evaluation of using the hardware/software codesign tool CoWare in education. We present experiences from using CoWare in a course on hardware/software codesign of embedded systems, mainly targeting system on a chip (SoC). CoWare N2C is a system design CAD tool for hardware/software codesign, i.e. the design of hardware and software in an integrated design flow. CoWare supports the incremental design refinement, cost and performance estimation, and interface synthesis. This increases the productivity for designer (student) that can concentrate on system description, hardware/software partitioning etc.

  • 120.
    O'Nils, Mattias
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Oelmann, Bengt
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Bertilsson, Kent
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Nilsson, Hans-Erik
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Thungström, Göran
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    A Project Based Master's Programme for SoF/SoC based Sensor Systems2005In: Proceedings of the 2005 European Conference on Circuit Theory and Design, IEEE conference proceedings, 2005, Vol. 2, p. 123-126, article id 1523008Conference paper (Refereed)
    Abstract [en]

    We forsee an increase in communicating sensor systems, that we call Sensible Things that Communicate (STC). These systems range from simple powerless systems for control or classification. In this paper we present the curriculum and pedagogical methods used in a Master's programme developed to meet the requirements that STC systems put on a designer. The goal for the program has been to encurage the students to acquire knowlege from completing practical design cases, of industrial or academic interest. This has shown to be an effective method to learn an motivate the students.

  • 121.
    O'Nils, Mattias
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Tammemae, Kalle
    Jantsch, Axel
    Hemani, Ahmed
    Design of D-AMPS Channel Decoder with Codesign Methodologies1996In: BEC '96, the 5th Biennial Baltic Electronics Conference, October 7-11, 1996, Tallinn, Estonia : proceedings, Tallinn, Estonia: Tallinn Technical University , 1996, p. 491-Conference paper (Refereed)
    Abstract [en]

    This paper is a case study on tool based codesign methodology. The presented methods are observed by applying a D-AMPS channel decoder design to a codesign research tool-kit. The channel decoder functionality is described with five thousand lines of C code. The analysis (profiling, estimation, hardware-software partitioning and verification) of the C description are presented in the paper.

  • 122.
    O'Nils, Mattias
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Tammemäe, K.
    Jantsch, A.
    Hemani, A.
    Tenhunen, H.
    Experiences using Akka: A Hardware-Software Codesign Tool Kit in design of Telecommunicationsystems1996In: Computer-aided validation engineering (CAVE '95) Workshop, 1996Conference paper (Other scientific)
  • 123.
    O'Nils, Mattias
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Thim, Jan
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Norlin, Börje
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Oelmann, Bengt
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Threshold Modulation for Continuous Energy Resolution with Two Channels per Pixel in a Photon Counting X-ray Image Detector2009In: Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, ISSN 0168-9002, E-ISSN 1872-9576, Vol. 607, no 1, p. 236-239Article in journal (Refereed)
    Abstract [en]

    The introduction of energy resolution in X-ray image detectors will lead to tradeoffs between circuit complexity and spatial/energy resolution in the pixel design. The proposed method provides continuous energy resolution with only two energy channels per pixel, which is a comparable complexity to that of a window discriminator pixel like Medipix2. The paper illustrates the method and validates the method through analytical analysis and through simulation of real and synthetic data.

  • 124.
    O'Nils, Mattias
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Thörnberg, Benny
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Lawal, Najeem
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    High-Level SystemC Synthesis for FPGA based Real-Time Video Processing Systems2006In: Proceedings of the FPGA World Conference, 2006Conference paper (Refereed)
  • 125.
    O'Nils, Mattias
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Öberg, Johnny
    Jantsch, Axel
    Grammar Based Modelling and Synthesis of Device Drivers and Bus Interfaces1998In: Proceedings. 24th EUROMICRO Conference, 25-27 Aug. 1998, Västerås: Vol. 1, 1998, p. 55-58Conference paper (Refereed)
    Abstract [en]

    ProGram, a grammar based communication protocol description language, is used for architectural independent modelling of device drivers and bus interfaces for mixed hardware/software systems. The specification of the protocol is separated from the description of processor bus interfaces and operating system device driver interfaces, which ensures a high efficiency in device driver development and maintenance. A synthesis method for device drivers is presented together with results on modelling and implementation efficiency for both device drivers and bus interfaces.

  • 126.
    Shahzad, Khurram
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    Condition Monitoring in Industry 4.0 - Design Challenges and Possibilities: A Case Study2018In: 2018 Workshop on Metrology for Industry 4.0 and IoT, MetroInd 4.0 and IoT 2018 - Proceedings, IEEE, 2018, p. 101-106, article id 8428306Conference paper (Refereed)
    Abstract [en]

    The application of IoT in manufacturing industry is believed to transform the traditional concept of factories into fully integrated manufacturing systems that are capable of meeting different requirements/demands originating within the factory, in supply chain and in user communities in a real time manner. One key area that is likely to benefit at an early stage development of the Industrial IoT is the condition monitoring of the production machinery. However, there are several challenges in realizing effective IoT enabled condition monitoring solutions with currently available enabling technologies. In this paper, we analyze the design challenges associated with realizing IoT enabled industrial condition monitoring with particular focus on enabling end-devices in managing large amount of acquired data. With the help of a vibration based condition monitoring case study the challenges are analyzed in a quantitative manner and possible alternatives are explored. The results suggest that for the efficient and long term condition monitoring in the smart industry of the future, improvements in the enabling technologies are required to design optimized end-devices. 

  • 127.
    Shallari, Irida
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    Anwar, Qaiser
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    Imran, Muhammad
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    Background Modelling, Analysis and Implementation for Thermographic Images2017In: PROCEEDINGS OF THE 2017 SEVENTH INTERNATIONAL CONFERENCE ON IMAGE PROCESSING THEORY, TOOLS AND APPLICATIONS (IPTA 2017), IEEE, 2017Conference paper (Refereed)
    Abstract [en]

    Background subtraction is one of the fundamental steps in the image-processing pipeline for distinguishing foreground from background. Most of the methods have been investigated with respect to visual images, in which case challenges are different compared to thermal images. Thermal sensors are invariant to light changes and have reduced privacy concerns. We propose the use of a low-pass IIR filter for background modelling in thermographic imagery due to its better performance compared to algorithms such as Mixture of Gaussians and K-nearest neighbour, while reducing memory requirements for implementation in embedded architectures. Based on the analysis of four different image datasets both indoor and outdoor, with and without people presence, the learning rate for the filter is set to 3×10-3 Hz and the proposed model is implemented on an Artix-7 FPGA.

  • 128.
    Shallari, Irida
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    Imran, Muhammad
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design. HIAB AB.
    Lawal, Najeem
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    Evaluating Pre-Processing Pipelines for Thermal-Visual Smart Camera2017In: Proceedings of the 11th International Conference on Distributed Smart Cameras, ACM Digital Library, 2017, Vol. F132201, p. 95-100Conference paper (Refereed)
    Abstract [en]

    Smart camera systems integrating multi-model image sensors provide better spectral sensitivity and hence better pass-fail decisions. In a given vision system, pre-processing tasks have a ripple effect on output data and pass-fail decision of high level tasks such as feature extraction, classification and recognition. In this work, we investigated four pre-processing pipelines and evaluated the effect on classification accuracy and output transmission data. The pre-processing pipelines processed four types of images, thermal grayscale, thermal binary, visual and visual binary. The results show that the pre-processing pipeline, which transmits visual compressed Region of Interest (ROI) images, offers 13 to 64 percent better classification accuracy as compared to thermal grayscale, thermal binary and visual binary. The results show that visual raw and visual compressed ROI with suitable quantization matrix offers similar classification accuracy but visual compressed ROI offers up to 99 percent reduced communication data as compared to visual ROI.

  • 129.
    Shallari, Irida
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    Krug, Silvia
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    Architectural evaluation of node: server partitioning for people counting2018In: ACM International Conference Proceeding Series, New York: ACM Digital Library, 2018, article id Article No. 1Conference paper (Refereed)
    Abstract [en]

    The Internet of Things has changed the range of applications for cameras requiring them to be easily deployed for a variety of scenarios indoor and outdoor, while achieving high performance in processing. As a result, future projections emphasise the need for battery operated smart cameras, capable of complex image processing tasks that also communicate within one another, and the server. Based on these considerations, we evaluate in-node and node – server configurations of image processing tasks to provide an insight of how tasks partitioning affects the overall energy consumption. The two main energy components taken in consideration for their influence in the total energy consumption are processing and communication energy. The results from the people counting scenario proved that processing background modelling, subtraction and segmentation in-node while transferring the remaining tasks to the server results in the most energy efficient configuration, optimising both processing and communication energy. In addition, the inclusion of data reduction techniques such as data aggregation and compression not always resulted in lower energy consumption as generally assumed, and the final optimal partition did not include data reduction.

  • 130.
    Shallari, Irida
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    Krug, Silvia
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    Communication and Computation Inter-Effects in People Counting Using Intelligence PartitioningManuscript (preprint) (Other academic)
  • 131.
    Taami, Tania
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    Krug, Silvia
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    Experimental Characterization of Latency in Distributed IoT Systems with Cloud Fog Offloading2019In: IEEE International Workshop on Factory Communication Systems - Proceedings, WFCS, Institute of Electrical and Electronics Engineers (IEEE), 2019, article id 8757960Conference paper (Refereed)
    Abstract [en]

    The Internet of Things (IoT) enables users to gather and analyze data from a large number of devices. Knowledge obtained by these systems is valuable in order to understand, control, and enhance the monitored process. The mass of information to process leads however to new challenges related to required resources for both data processing and data transportation. Two critical metrics are latency and consumed energy to complete a given task. Both metrics might be exceed if all processing is done locally at the sensor device level. Cloud and Fog computing concepts can help to mitigate this effect. However, using such offloading concepts add complexity and overhead to the system. In this paper, we study the latency for processing and communication tasks in a distributed IoT systems with respect to cloud or fog offloading and derive characteristic cost functions for the studied tasks. Our results give valuable insights into the tradeoffs and constraint within our example scenario. The developed characterization methodology can however be applied to any kind of IoT system and thus allowing more general analysis. 

  • 132. Tammemäe, K
    et al.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Hemani, A
    Flexible Codesign Target Architecture for Early Prototyping of CMIST Systems1996In: Proceedings. 6th International Workshop on Field-Programmable Logic, FPL '96, Darmstadt, Germany, September 23-25, 1996: Field-Programmable Logic, Smart Applications, New Paradigms and Compilers, Springer , 1996, p. 193-199Conference paper (Refereed)
    Abstract [en]

    We present an architecture for rapid prototyping of selected controldominated HW parts resulting from HW/SW cosynthesis. Our codesign toolkit AKKA[1], which targets to design of control intensive systems, consists of design space exploration, estimation, partitioning, cosimulation and verification subtools in common environment. For fast prototyping of HW parts an EVC board with Xilinx XC4013 FPGA is used. We describe an multifunctional architecture, programmable into the FPGA, consisting of reusable interface/memory section and synthesized functional part. Usability of architecture in client-server relationship is described.

  • 133. Tammemäe, K.
    et al.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Jantsch, A.
    Hemani, A.
    AKKA: A Codesign Environment1995In: The 13th NORCHIP Conference: Copenhagen, Denmark, November 7-8, 1995, 1995, p. 249-Conference paper (Other scientific)
  • 134. Tammemäe, K
    et al.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Tornemo, A
    Tenhunen, Hannu
    VLSI System Level Codesign Toolkit AKKA1996In: Selected articles from the 1996 NORCHIP Seminar : [held November 4 - 5, 1996, in Helsinki], Boston [u.a.] :: Kluwer , 1996Conference paper (Refereed)
    Abstract [en]

    We present a toolkit for embedded system VLSI design. Toolkit AKKA1 [1], consists of design space exploration through profiling, estimation, partitioning, cosimulation and cosynthesis subtools. Most of tasks in this list can be classified into HW/SW codesign domain. We will describe proposed design flow, starting from design capture and ending with generation of unique synthesis-able VHDL code for HW, and assembler code for SW. Our approach is oriented to control and memory intensive systems. It is illustrated by a Mandelbrot plotter in this paper.

  • 135. Tammemäe, Kalle
    et al.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Jantsch, Axel
    Hemani, Ahmed
    AKKA: A Tool-kit for Cosynthesis and Prototyping1996In: Hardware-Software Cosynthesis for Reconfigurable Systems, IEE Colloquium, Bristol 22 Feb. 1996, 1996, p. 8/1-8/8Conference paper (Other scientific)
    Abstract [en]

    Shortened design and life time of embedded systems has motivated active research in HW/SW co-design area, together with evolution of relatively long-life of reconfigurable HW. In this paper we present Akka1[1][2] - a set of tools for design space exploration, co-simulation and co-synthesis with two industrial examples from the telecommunication field - Maintenance functionality of the ATM protocol and Channel decoder functionality of a D-AMPS base station. For fast prototyping we have selected Xilinx XC4013 FPGA based board from Virtual Computer Corporation. The board is connected to the system bus (SBus) of the host computer.

  • 136.
    Thim, Jan
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Manuilskiy, A
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    O´Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Thörnberg, Benny
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Lindgren, J
    Lidén, J
    The Impact of Surface Movement in Online Paper Topgraphy Cahracerization Using Light Triangulation2009In: Proceedings fo the Papermaker´s Research Symposium, 2009Conference paper (Refereed)
  • 137.
    Thim, Jan
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Norlin, Börje
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    O'Nils, Matthias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Abdalla, Suliman
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Oelmann, Bengt
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Realizing increased sub-pixel spatial resolution in X-ray imaging using displaced multiple images2011In: Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, ISSN 0168-9002, E-ISSN 1872-9576, Vol. 633, no Suppl 1, p. S247-S249Article in journal (Refereed)
    Abstract [en]

    A method, generally called oversampling, to reach sub-pixel resolution by taking slightly displaced images of an object is investigated for X-ray applications. By mounting the sensor on a high precision step motor table it is possible to increase the spatial resolution from 55 ÎŒm×55 ÎŒm to at least 20 ÎŒm×20 ÎŒm, which is required for quality assurance measurements in several industry processes. The performance compared to physically smaller pixels is shown, and the effects of charge sharing on the method are investigated. The suggested method is relatively cost effective compared to using X-ray microscopy. © 2010 Elsevier B.V. All rights reserved.

  • 138.
    Thim, Jan
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Norlin, Börje
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Abdalla, Suliman
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Oelmann, Bengt
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Realizing increased sub-pixel spatial resolution in X-ray imaging using displaced multiple images2009In: 11th International Workshop on Radiation Imaging Detectors, 2009Conference paper (Refereed)
    Abstract [en]

    In X-Ray imaging with pixel detector systems, the resolution of the image taken is dependant on the pixel size in the detector readout electronics. Depending on the functionality of the readout electronics, the surface space on the readout chip for each pixel has a minimum size, which sets the spatial resolution of the taken images. For applications where it is required to image extremely small structures in a material, the spatial resolution of the X-Ray detector system sets the limit, and readout systems with high functionality cannot be considered. One way to reach sub-pixel resolution is to use a nanofocus source to achieve an X-ray microscopy setup [1]. However, this type of X-ray source is still too expensive to be an alternative for quality assurance systems used in the industry. In this paper we focus on a much simpler way of increasing spatial resolution that has proven effective in images for visible light. By mounting either the objects for imaging or the image sensor system on a step motor table and take multiple images slightly dislocated from one another, an increase in sub-pixel spatial resolution can be achieved.

    Consider the case that an image sensor system with a pixel size of 55x55 µm is available for an imaging application that requires a resolution of 20x20 µm. The application is material characterization and allows for multiple images to be taken for one sample. In this case, increasing the sub-pixel resolution by nine times (3x3) will result in a pixel size of about 18x18 µm, which would meet the requirements. This can be realized by taking nine images dislocated 1/3 of the pixel width from each other. If the upper left pixel of the centre image has coordinates (0,0) the upper left pixel of all the nine images will have coordinates (-1/3,1/3), (0,1/3), (1/3,1/3), (-1/3,0), (0,0), (1/3,0), (-1/3,-1/3), (0,-1/3) and (1/3,-1/3). The result of a direct combination of these images is illustrated in Figure 1, where one of nine images is shown at the left. Combining the images without images processing with an algorithm will yield the image in the centre, which can be compared to how the image would look in full 9x resolution (right image). As can be seen, some details are lost and the image is blurred compared to a full resolution image. However, with an image processing algorithm in the combination phase this effect can be reduced and the image quality increased.

    This paper shows simulated and measured results from using dislocation imaging in X-Ray imaging systems, where the test case system will be the MEDIPIX2 system [2]. An investigation of different image processing algorithms suitable for this type of imaging is conducted. An investigation is also done to show whether detectors with large size pixels compared to the standard size in a MEDIPIX system can be combined with the described sub-pixel scaling technique. The result of this combination is used to investigate the charge sharing effects on the MEDIPIX system.

    [1] Norlin B., Fröjdh C., Nuclear Instruments and Methods, sect. A (2009), doi:10.1016/j.nima.2009.03.155[2] Llopart X., Campbell M., Dinapoli R., san Segundo D., Pernigotti E., IEEE Transactions on Nuclear Science, Vol. 49, Issue 5, Part 1, pp. 2279-2283, October 2002.

    Figure 1. Image (left) with 50x50 pixels, with the resulting combination of nine images forming an image with a sub-pixel resolution of 150x150 pixel (centre), compared to a full resolution reference image (right).

  • 139.
    Thim, Jan
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Manuilskiy, Anatoliy
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Thörnberg, Benny
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Simulating the Impact of Topographical Microstructures on Triangulation Measurement Setups using Matlab2008In: Proceedings of Nordic MATLAB User Conference, 2008Conference paper (Refereed)
    Abstract [en]

    The paper manufacturing industry is currently exploring the possibility of measuring micro structural topography online in a paper manufacturing machine, which is intended to lead to a more precise measure of the paper quality reel to reel and a more efficient use of raw material. This paper presents a Matlab simulation model that can be used to configure such measurement readout systems, and includes a demonstration of the model in use. The model will also be used for research purposes in order to assist in gaining a better understanding of both the limitations and possibilities of such measurement systems. In this regard the angular shading of microstructures and Centre of Gravity (CoG) functions are included in the attributes that require further exploration.

     

  • 140.
    Thim, Jan
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Reza, Salim
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Nawaz, Khalid
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Norlin, Börje
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    O´Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Oelmann, Bengt
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Suitable Post Processing Algorithms for X-Ray Imaging using Oversampled Displaced Multiple Images2011In: Journal of Instrumentation, ISSN 1748-0221, E-ISSN 1748-0221, Vol. 6, no 2, p. Art. no. C02001-Article in journal (Refereed)
    Abstract [en]

    X-ray imaging systems such as photon counting pixel detectors have a limited spatial resolution of the pixels, based on the complexity and processing technology of the readout electronics. For X-ray imaging situations where the features of interest are smaller than the imaging system pixel size, and the pixel size cannot be made smaller in the hardware, alternative means of resolution enhancement require to be considered. Oversampling with the usage of multiple displaced images, where the pixels of all images are mapped to a final resolution enhanced image, has proven a viable method of reaching a sub-pixel resolution exceeding the original resolution. The effectiveness of the oversampling method declines with the number of images taken, the sub-pixel resolution increases, but relative to a real reduction of imaging pixel sizes yielding a full resolution image, the perceived resolution from the sub-pixel oversampled image is lower. This is because the oversampling method introduces blurring noise into the mapped final images, and the blurring relative to full resolution images increases with the oversampling factor. One way of increasing the performance of the oversampling method is by sharpening the images in post processing. This paper focus on characterizing the performance increase of the oversampling method after the use of some suitable post processing filters, for digital X-ray images specifically. The results show that spatial domain filters and frequency domain filters of the same type yield indistinguishable results, which is to be expected. The results also show that the effectiveness of applying sharpening filters to oversampled multiple images increase with the number of images used (oversampling factor), leaving 60-80% of the original blurring noise after filtering a 6 x 6 mapped image (36 images taken), where the percentage is depending on the type of filter. This means that the effectiveness of the oversampling itself increase by using sharpening filters, and more images taken can be considered worth the effort.

  • 141.
    Thim, Jan
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    Reza, Salim
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    Norlin, Börje
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
    X-ray imaging of high velocity moving objects by scanning summation using a single photon processing system2015In: Journal of Instrumentation, ISSN 1748-0221, E-ISSN 1748-0221, article id C04023Article in journal (Refereed)
    Abstract [en]

    X-ray imaging has been used extensively in the manufacturing industry. In the paper and paperboard industry X-ray imaging has been used for measuring parameters such as coat weight, using mean values of X-ray absorption inline in the manufacturing machines. Recently, an interest has surfaced to image paperboard coating with pixel resolved images showing material distribution in the coating on the paperboard, and to do this inline in the paper machine. Naturally, imaging with pixel resolution in an application where the paperboard web travels with velocities in the order on 10 m/s sets harsh demands on the X-ray source and the detector system to be used. This paper presents a scanning imaging method for single photon imaging systems that lower the demands on the source flux by hundreds of times, enabling a system to be developed for high velocity industrial measurement applications. The paper presents the imaging method, a discussion of system limitations, simulations and real measurements in a laboratory environment with a moving test object of low velocity, all to verify the potential and limits of the proposed method.

  • 142.
    Thörnberg, Benny
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Hu, Qubo
    Norwegian University of Science and Technology, 7491 Trondheim, Norway; Norwegian University of Science and Technology, Trondheim, Norway.
    Palkovic, Martin
    MEC, B-3001 Leuven, Belgium.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Kjeldsberg, Per Gunnar
    Norwegian University of Science and Technology, 7491 Trondheim, Norway; NTNU, Norway .
    Polyhedral space generation and memory estimation from interface and memory models of real-time video systems2006In: Journal of Systems and Software, ISSN 0164-1212, E-ISSN 1873-1228, Vol. 79, no 2, p. 231-245Article in journal (Refereed)
    Abstract [en]

    We present a tool and a methodology for estimating the memory storage requirement for synchronous real-time video processing systems. Typically, a designer will use the feedback information from this estimation to select the most optimal execution order for software processors or space to time mapping for hardware. We propose to start from a conceptual interface and memory model that captures memory usage and data transfers. This high-level modeling is provided as an extension library of SystemC called IMEM. A common polyhedral iteration space is generated from the model, where polytopes are placed using a new placement algorithm based on simple heuristics. This algorithm will ensure maximum freedom of selecting executing order as all negative dependencies are removed to the length of zero. A demonstration is given regarding how the polytopes and dependency vectors can then be used as input to a memory storage estimation tool called STOREQ.

  • 143.
    Thörnberg, Benny
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Norell, Håkan
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Conceptual Interface and Memory-Modelling for Real-Time Image Processing Systems- IMEM: A tool for Modeling, Simulation and Design Parameter Extraction2002In: Proceedings of 2002 IEEE Workshop on Multimedia Signal Processing, MMSP 2002: 9-11 Dec. 2002 , St.Thomas, VI, USA, IEEE conference proceedings, 2002, p. 138-141, article id 1203267Conference paper (Refereed)
    Abstract [en]

    Most operations invoked in video processing systems are neighborhood oriented. For a video system designer, this limited spatio-temporal collection of pixels represents a natural abstraction. In this paper, we present a basic set of object-oriented design entities. Entities, which can be combined to capture an interface and memory model at a conceptual level, with the neighborhood as an abstraction. These design entities, called IMEM, are implemented as an extension to SystemC. IMEM supports conceptual modeling that excludes implementation details and has explicit data dependency built-in to the model. This makes IMEM a very efficient starting point for design-space exploration and system synthesis. We propose two workflows. The first is a system development workflow, where IMEM represents the starting point of a gradual refinement process, supported by an automated design space exploration step. The second workflow, based on direct mapping of the interface and memory model is presented as being suitable for rapid prototyping. A spatio-temporal noise-reduction filter is selected as a test-vehicle in order to demonstrate the feasibility of IMEM.

  • 144.
    Thörnberg, Benny
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Engineering, Physics and Mathematics.
    Olsson, Leif
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Engineering, Physics and Mathematics.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Optimization of memory allocation for real-time video processing on FPGA2005In: 16th International Workshop on Rapid System Prototyping, Proceedings - SHORTENING THE PATH FROM SPECIFICATION TO PROTOTYPE, IEEE conference proceedings, 2005, Vol. 2005, p. 141-147Conference paper (Refereed)
    Abstract [en]

    We present an optimization model for the allocation of shift registers to dual ported FPGA memory blocks. Shift registers are used in real-time video processing for the storage of data flow dependencies. The model is formalized into a mixed integer linear program that can be executed using a general solver. Allocation results from realistic video systems verify the correctness of the model. This model serves as a formal specification and setup for the development of an efficient allocation heuristic.

  • 145.
    Thörnberg, Benny
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Analysis of modeling and simulation capabilities in systemC and Ocapi using a video filter design2002In: System on chip design languages :: extended papers : best of FDL’01 and HDLCon’01, Boston, Mass: Kluwer Academic Publishers, 2002, p. 283-Chapter in book (Other academic)
    Abstract [en]

    Several system specification languages are emerging from C and C++. This development is driven by the large competence that exists for these languages. The programming language itself lacks many of the necessary constructs one requires from a specification language. Therefore, specification languages based on C/C++ are often a superset of the programming language. Where all the necessary constructs for system specification is added to the language. This paper evaluates and compares SystemC and Ocapi, which both are specification methods based on C++. The analysis is done as a case study with focus on the modelling and simulation effectiveness for video systems. The system we have selected is a spatio-temporal video filter. This video filter is characterised by high computational complexity, by high requirements on memory size and memory bandwidth.

  • 146.
    Thörnberg, Benny
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Automated implementation of interface- and memory models for real-time video processing systems2003In: Proceedings of IEEE Norchip Conference, November 2003 (Riga), 2003Conference paper (Refereed)
    Abstract [en]

    We present a source-code generator for real-time video processing systems that automatically optimise the cache and scheduler performance for selected target architectures. Code can be directly generated from a modelled neighbourhood without any additional data dependency analysis. Experimental results show that almost all data cache misses are removed and we can see a reduction of the execution time in the order of 25 percent compared to non-tuned code. The source-code generator is a part of an automated and target independent development trajectory and motivated by improved designer productivity.

  • 147.
    Thörnberg, Benny
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Impact of Bit-Width specification on the memory hierarchy for a real-time video processing system2006In: Proceedings -Design, Automation and Test in Europe, DATE, Piscataway, NJ: IEEE conference proceedings, 2006, p. 750-751, article id 1656989Conference paper (Refereed)
    Abstract [en]

    The great variety of pixel dynamics of real-time video processing systems, ranging from color, grayscale or binary pixels, means that a careful design and specification of bit-widths is required. It is obvious that the bit-width specification will affect the total memory storage requirement. However, what is not so obvious is that the bit-width specification will also affect the design of the memory hierarchy, an impact similar for both hardware and software implementations. A real-life surveillance system is introduced, as a demonstration application showing how the optimal allocation of shift registers for the storage of intermediate results is sensitive to bit-widths. From this we conclude, that careful memory hierarchy design where bit-widths are considered can reduce the total on-chip memory storage requirement by 61 percent compared to a non-optimal design.

  • 148.
    Thörnberg, Benny
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Palkovic, Martin
    Hu, Qubo
    Olsson, Leif
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Engineering, Physics and Mathematics.
    Kjeldsberg, Per Gunnar
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Catthor, Francky
    Bit-Width Constrained Memory Hierarchy Optimization for Real-Time Video Systems2007In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ISSN 0278-0070, E-ISSN 1937-4151, Vol. 26, no 4, p. 781-800Article in journal (Refereed)
    Abstract [en]

    The great variety of pixel dynamics of real-time video processing systems, ranging from color, grayscale or binary pixels, means that a careful design and specification of bit-widths is required. It is obvious that the bit-width specification will affect the total memory storage requirement. However, what is not so obvious is that the bit-width specification will also affect the design of the memory hierarchy, an impact similar for both hardware and software implementations. We have developed an Integer Non Linear Program (INLP) formulation for the optimization of the memory hierarchy of real-time video processing systems. An active surveillance video camera is introduced as a test case. We demonstrate how the optimization model can reduce the on-chip memory storage by 61 percent compared to a non optimal memory hierarchy.

  • 149.
    Thörnberg, Beny
    et al.
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Norell, Håkan
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    IMEM: An Object Oriented Memory- and Interface Modeling Approach for Real-Time Video Processing Systems2002In: Proceedings / FDL '02, Forum on Specification & Design Languages, Marseille, France, Sept 24-27, 2002: FDL ; 5 (Marseille) : 2002.09.24-27, Marseille, 2002Conference paper (Refereed)
  • 150. Öberg, J.
    et al.
    O'Nils, Mattias
    Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
    Jantsch, A.
    Postula, A.
    Hemani, A.
    Grammar-based Design of Embedded Systems2001In: Journal of systems architecture, ISSN 1383-7621, E-ISSN 1873-6165, Vol. 47, no 3-4, p. 225-240Article in journal (Refereed)
    Abstract [en]

    Grammars define syntax of languages and as such have not been commonly considered as methods for design, despite well-known applications in computer science. Only in recent years grammar-based design has become a promising research field and the first commercial tools have appeared on the market. This paper reviews the basic concepts of applying grammars to electronic design - in particular to the device driver synthesis of communication protocols for embedded software, to the design of custom-hardware, and to the virtual prototyping of DSP systems. The paper shows the power of these methods, presents the latest research results and discusses future developments in this field.

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