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Exploration of preprocessing architectures for field-programmable gate array-based thermal-visual smart camera
Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
Alpen-Adria-Universität, Institute of Networked and Embedded Systems, Lakeside Park B02b, Klagenfurt, Austria .
Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
2016 (English)In: Journal of Electronic Imaging (JEI), ISSN 1017-9909, E-ISSN 1560-229X, Vol. 25, no 4, 041006Article in journal (Refereed) Published
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Text
Abstract [en]

Embedded smart cameras are gaining in popularity for a number of real-Time outdoor surveillance applications. However, there are still challenges, i.e., computational latency, variation in illumination, and occlusion. To solve these challenges, multimodal systems, integrating multiple imagers can be utilized. However, trade-off is more stringent requirements on processing and communication for embedded platforms. To meet these challenges, we investigated two low-complexity and high-performance preprocessing architectures for a multiple imagers' node on a field-programmable gate array (FPGA). In the proposed architectures, majority of the tasks are performed on the thermal images because of the lower spatial resolution. Analysis with different sets of images show that the system with proposed architectures offers better detection performance and can reduce output data from 1.7 to 99 times as compared with full-size images. The proposed architectures can achieve a frame rate of 53 fps, logics utilization from 2.1% to 4.1%, memory consumption 987 to 148 KB and power consumption in the range of 141 to 163 mW on Artix-7 FPGA. This concludes that the proposed architectures offer reduced design complexity and lower processing and communication requirements while retaining the configurability of the system.

Place, publisher, year, edition, pages
2016. Vol. 25, no 4, 041006
Keyword [en]
architecture, field-programmable gate array, preprocessing, smart camera, thermal
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:miun:diva-28491DOI: 10.1117/1.JEI.25.4.041006ISI: 000387787000006Scopus ID: 2-s2.0-84973466871Local ID: STCOAI: oai:DiVA.org:miun-28491DiVA: diva2:949673
Note

CODEN: JEIME

Available from: 2016-07-22 Created: 2016-07-21 Last updated: 2017-06-30Bibliographically approved

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Imran, MuhammadO'Nils, Mattias
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CiteExportLink to record
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Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
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Language
  • de-DE
  • en-GB
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  • nn-NO
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More languages
Output format
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