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Machine vision architecture on FPGA
Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
2012 (English)Licentiate thesis, comprehensive summary (Other academic)
Place, publisher, year, edition, pages
Sundsvall: Mid Sweden University , 2012. , 111 p.
Series
Mid Sweden University licentiate thesis, ISSN 1652-8948 ; 82
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:miun:diva-16698Local ID: STCISBN: 978-91-87103-16-2 (print)OAI: oai:DiVA.org:miun-16698DiVA: diva2:543832
Available from: 2012-08-10 Created: 2012-08-10 Last updated: 2016-10-20Bibliographically approved
List of papers
1. Real-time Component Labelling with Centre of Gravity Calculation on FPGA
Open this publication in new window or tab >>Real-time Component Labelling with Centre of Gravity Calculation on FPGA
2011 (English)In: 2011 Proceedings of Sixth International Conference on Systems, 2011Conference paper, Published paper (Refereed)
Abstract [en]

In this paper we present a hardware unit for real time component labelling with Centre of Gravity (COG) calculation. The main targeted application area is light spots used as references for robotic navigation. COG calculation can be done in parallel with a single pass component labelling unit without first having to resolve merged labels. We present hardware architecture suitable for implementation of this COG unit on Field programmable Gate Arrays (FPGA). As result, we get high frame speed, low power and low latency. The device utilization and estimated power dissipation are reported for Xilinx Virtex II pro device simulated at 86 VGA sized frames per second. Maximum speed is 410 frames per second at 126 MHz clock.

Identifiers
urn:nbn:se:miun:diva-12170 (URN)STC (Local ID)STC (Archive number)STC (OAI)
Conference
Sixth International Conference on Systems ICONS 2011
Projects
OptiPos
Available from: 2010-10-29 Created: 2010-10-29 Last updated: 2016-10-19Bibliographically approved
2. Generalized Architecture for a Real-time Computation of an Image Component Features on a FPGA
Open this publication in new window or tab >>Generalized Architecture for a Real-time Computation of an Image Component Features on a FPGA
Show others...
(English)Manuscript (preprint) (Other academic)
Abstract [en]

This paper describes a generalized architecture for real-time component labeling and computation of image component features. Computing real-time image component features is one of the most important paradigms for modern machine vision systems. Embedded machine vision systems demand robust performance, power efficiency as well as minimum area utilization. The presented architecture can easily be extended with additional modules for parallel computation of arbitrary image component features. Hardware modules for component labeling and feature calculation run in parallel. This modularization makes the architecture suitable for design automation. Our architecture is capable of processing 390 video frames per second of size 640x480 pixels. Dynamic power consumption is 24.20mW at 86 frames per second on a Xilinx Spartran6 FPGA.

National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-14536 (URN)
Projects
STC
Available from: 2011-09-26 Created: 2011-09-26 Last updated: 2013-11-11Bibliographically approved
3. Real-Time machine vision system using FPGA and soft-core processor
Open this publication in new window or tab >>Real-Time machine vision system using FPGA and soft-core processor
2012 (English)In: Proceedings of SPIE - The International Society for Optical Engineering, SPIE - International Society for Optical Engineering, 2012, Art. no. 84370Z- p.Conference paper, Published paper (Refereed)
Abstract [en]

This paper presents a machine vision system for real-time computation of distance and angle of a camera from reference points in the environment. Image pre-processing, component labeling and feature extraction modules were modeled at Register Transfer (RT) level and synthesized for implementation on field programmable gate arrays (FPGA). The extracted image component features were sent from the hardware modules to a soft-core processor, MicroBlaze, for computation of distance and angle. A CMOS imaging sensor operating at a clock frequency of 27MHz was used in our experiments to produce a video stream at the rate of 75 frames per second. Image component labeling and feature extraction modules were running in parallel having a total latency of 13ms. The MicroBlaze was interfaced with the component labeling and feature extraction modules through Fast Simplex Link (FSL). The latency for computing distance and angle of camera from the reference points was measured to be 2ms on the MicroBlaze, running at 100 MHz clock frequency. In this paper, we present the performance analysis, device utilization and power consumption for the designed system. The FPGA based machine vision system that we propose has high frame speed, low latency and a power consumption that is much lower compared to commercially available smart camera solutions. © 2012 SPIE.

Place, publisher, year, edition, pages
SPIE - International Society for Optical Engineering, 2012
Keyword
Component labeling; Machine vision; Smart camera
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-16697 (URN)10.1117/12.927854 (DOI)000305693900028 ()2-s2.0-84861951577 (Scopus ID)STC (Local ID)978-081949129-9 (ISBN)STC (Archive number)STC (OAI)
Conference
Real-Time Image and Video Processing 2012;Brussels;19 April 2012through19 April 2012;Code90041
Available from: 2012-08-10 Created: 2012-08-10 Last updated: 2016-10-20Bibliographically approved
4. Optimized Color Pair Selection for Label Design
Open this publication in new window or tab >>Optimized Color Pair Selection for Label Design
2011 (English)In: Proceedings Elmar - International Symposium Electronics in Marine, Zadar, Croatia: IEEE conference proceedings, 2011, 115-118 p.Conference paper, Published paper (Refereed)
Abstract [en]

We present in this paper a technique for designing reference labels that can be used for optical navigation. We optimize the selection of foreground and background colors used for the printed reference labels. This optimization calibrates for individual color responses among printers and cameras such that the Signal to Noise Ratio (SNR) is maximized. Experiments show that we get slightly smaller SNR for the color labels compared to using a monochrome technique. However, the number of segmented image components is reduced significantly by as much as 78 percent. This reduction of number of image components will in turn reduce the memory storage requirement for the computing embedded system.

Place, publisher, year, edition, pages
Zadar, Croatia: IEEE conference proceedings, 2011
Keyword
Label, Recognition, Position Measurement, COG, Subpixel Precision, RGB, HSI, YCbCr
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-14531 (URN)2-s2.0-80055085889 (Scopus ID)STC (Local ID)978-953-7044-12-1 (ISBN)STC (Archive number)STC (OAI)
Conference
53rd International Symposium ELMAR-2011; Zadar; 14 September 2011 through 16 September 2011
Projects
Optipos
Available from: 2011-09-26 Created: 2011-09-26 Last updated: 2016-10-19Bibliographically approved
5. Color Symbol Design and Its Classification for Optical Navigation
Open this publication in new window or tab >>Color Symbol Design and Its Classification for Optical Navigation
(English)Manuscript (preprint) (Other academic)
Abstract [en]

We explored the color symbol design and its recognition in image as reference structure for optical navigation. A colors pair was first determined as foreground and background from HSI color palette and then a color symbol was designed as reference structure. The advantage of using this selected color symbol is a significant reduction, up to 97%, of segmented image components as compared to the grey scale image used. The reduction of segmented components in image will result in saving the hardware resources e.g. memory and processing power which are very important constraint for embedded platforms. A color symbol pattern was designed, comprising of three concentric circles with selected color pair. Inside the inner most circle is the Area Of Interest (AOI), the contents of AOI depends on the particular application. A hardware centric image analysis algorithm is developed for easy and robust recognition. Image components are identified after preprocessing, segmentation and labeling. The color symbol can be recognized at a classification step. Evaluating a variety of viewing angles and reading distances ranging from 30 to 150 degrees and from 1 to 10 meters gives a classification success rate of 72 percent of the positions.

Keyword
Reference symbol, SNR, Classification, Nearest-neighbors rule, COG, Recognition, Position Measurement, Robotic Navigation, Machine Vision
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-15200 (URN)
Projects
STCIndustriella IT-system
Available from: 2011-12-13 Created: 2011-12-13 Last updated: 2012-08-10Bibliographically approved

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