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Maintenance Consideration for Long Life Cycle Embedded System
Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media. (STC)
2012 (English)Licentiate thesis, comprehensive summary (Other academic)
Abstract [en]

     In this thesis, the work presented is in relation to consideration to the maintenance of a long life cycle embedded system. Various issues can present problems for maintaining a long life cycle embedded system, such as component obsolescence and IP (intellectual property) portability.      For products including automotive, avionics, military application etc., the desired life cycles for these systems are many times longer than the obsolescence cycle for the electronic components used in the systems. The maintainability is analyzed in relation to long life cycle embedded systems for different design technologies. FPGA platform solutions are proposed in order to ease the system maintenance. Different platform cases are evaluated by analyzing the essence of each case and the consequences of different risk scenarios during system maintenance. This has shown that an FPGA platform with a vendor and device independent soft IP has the highest maintainability.A mathematic model of obsolescence management for long life cycle embedded system maintenance is presented. This model can estimate the minimum management costs for the different system architecture and this consists of two parts. The first is to generate a graph in Matlab which is in the form of state transfer diagram. A segments table is then output from Matlab for further optimization. The second part is to find the lowest cost in the state transfer diagram, which can be viewed as a transshipment problem. Linear programming is used to calculate the minimized management cost and schedule, which is solved by Lingo. A simple Controller Area Network (CAN) controller system case study is shown in order to apply this model. The model is validated by a set of synthetic and experimentally selected values. The results provided by this are a minimized management cost and an optimized management time schedule. Test experiments of the maintenance cost responding to the interest rate and unit cost are implemented. The responses from the experiments meet our expectations.      The reuse of predefined IP can shorten development times and assist the designer to meet time-to-market (TTM) requirements. System migration between devices is unavoidable, especially when it has a long life cycle expectation, so IP portability becomes an important issue for system maintenance. An M-JPEG decoder case study is presented in the thesis. The lack of any clear separation between computation and communication is shown to limit the IP’s portability with respect to different communication interfaces. A methodology is proposed to ease the interface modification and interface reuse, thus to increase the portability of an IP. Technology and tool dependent firmware IP components are also shown to limit the IP portability with respect to development tools and FPGA vendors.

Place, publisher, year, edition, pages
Sundsvall: Mid Sweden University , 2012.
Series
Mid Sweden University licentiate thesis, ISSN 1652-8948 ; 81
National Category
Embedded Systems
Identifiers
URN: urn:nbn:se:miun:diva-16440Local ID: STCISBN: 978-91-87103-14-8 (print)OAI: oai:DiVA.org:miun-16440DiVA: diva2:533606
Supervisors
Available from: 2012-06-14 Created: 2012-06-14 Last updated: 2016-10-20Bibliographically approved
List of papers
1. Embedded System Design with Maintenance  Consideration
Open this publication in new window or tab >>Embedded System Design with Maintenance  Consideration
2011 (English)In: Proceedings of the 34th International Convention on Information and Communication Technology, Electronics and Microelectronics, MIPRO, IEEE conference proceedings, 2011, 124-129 p.Conference paper, Published paper (Refereed)
Abstract [en]

This paper deals with the problems of maintaining a long lifetime embedded system, including obsolescence, function change requirement or technology migration etc. The aim of the presented work is to analyze the maintainability of long lifetime embedded systems for different design technologies. FPGA platform solutions are proposed in order to ease the system maintenance. Different platform cases are evaluated by analyzing the essence of each case and the consequences of different risk scenarios during system maintenance. Finally, the conclusion is drawn that the FPGA platform with vendor and device independent soft IP is the best choice.

Place, publisher, year, edition, pages
IEEE conference proceedings, 2011
Keyword
embedded system, maintenance, obsolescence, FPGA, soft IP
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-14308 (URN)2-s2.0-80052299852 (Scopus ID)STC (Local ID)978-1-4577-0996-8 (ISBN)STC (Archive number)STC (OAI)
Conference
34th International Convention on Information and Communication Technology, Electronics and Microelectronics, MIPRO 2011;Opatija;23 May 2011through27 May 2011;Category numberCFP1139K-CDR;Code86227
Projects
STC
Available from: 2011-08-15 Created: 2011-08-15 Last updated: 2016-10-19Bibliographically approved
2. Soft-IP Interface Modification Methodology
Open this publication in new window or tab >>Soft-IP Interface Modification Methodology
2011 (English)In: Proceedings of 2011 International Conference on Information and Electronics Engineering, 2011Conference paper, Published paper (Refereed)
Abstract [en]

The reuse of predefined Intellectual Property (IP) can lead to great success in system design and help the designer to meet time-to-market requirements. A soft IP usually needs some customization and integration efforts rather than plug-and-play. Communication interface mismatch is one of the problems that integrators often meet. This paper suggests a soft-IP interface modification methodology (SIPIMM) for systems on Field Programmable Gate Array (FPGA) SIPIMM targets an interface-based soft IP model which is introduced to ease the interface modification and interface reuse. A case study of an open-source IP is presented using SIPIMM for system integration.

Keyword
IP, FPGA, interface mismatch
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-13277 (URN)STC (Local ID)STC (Archive number)STC (OAI)
Conference
ICIEE 2011
Projects
STC
Available from: 2011-02-17 Created: 2011-02-17 Last updated: 2016-10-19Bibliographically approved
3. Portability analysis of an M-JPEG decoder IP from OpenCores
Open this publication in new window or tab >>Portability analysis of an M-JPEG decoder IP from OpenCores
2011 (English)In: SIES 2011 - 6th IEEE International Symposium on Industrial Embedded Systems, Conference Proceedings, IEEE conference proceedings, 2011, 79-82 p.Conference paper, Published paper (Refereed)
Abstract [en]

The reuse of predefined Intellectual Property (IP) can shorten development times and help the designer to meet time-to-market requirements for embedded systems. Using FPGA IP in a proper way can also mitigate the component obsolescence problem. System migration between devices is unavoidable, especially for long lifetime embedded systems, so IP portability becomes an important issue for system maintenance. This paper presents a case study analyzing the portability of an FPGA-based M-JPEG decoder IP. The lack of any clear separation between computation and communication is shown to limit the decoder's portability with respect to different communication interfaces. Technology and tool dependent firmware IP components are often supplied by FPGA vendors. It is possible for these firm IP components to reduce development time. However, the use of these technology and tool dependent firmware specifications within the M-JPEG decoder is shown to limit the decoder's portability with respect to development tools and FPGA vendors.

Place, publisher, year, edition, pages
IEEE conference proceedings, 2011
Keyword
IP, FPGA, obsolescence, maintenance, portability, M-JPEG decoder
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-14310 (URN)10.1109/SIES.2011.5953685 (DOI)2-s2.0-80052019062 (Scopus ID)STC (Local ID)978-1-61284-819-8 (ISBN)978-1-61284-818-1 (ISBN)STC (Archive number)STC (OAI)
Conference
6th IEEE International Symposium on Industrial Embedded Systems, SIES 2011;Vasteras;15 June 2011through17 June 2011;Category numberCFP11INB-ART;Code86076
Projects
STC
Available from: 2011-08-15 Created: 2011-08-15 Last updated: 2016-10-19Bibliographically approved
4. Component obsolescence management model for long life cycle embedded system
Open this publication in new window or tab >>Component obsolescence management model for long life cycle embedded system
2012 (English)In: AUTOTESTCON (Proceedings), Anaheim, California: IEEE conference proceedings, 2012, 19-24 p.Conference paper, Published paper (Refereed)
Abstract [en]

This paper discusses the component obsolescence problem and presents a mathematic model for life cycle analysis of long life cycle embedded system maintenance. This model can estimate minimized management costs for different system architecture. Matlab is used to generate a graph and Lingo is used for linear programming. A simple CAN controller system case study is shown to apply this model. A minimized management cost and an optimized management time schedule are given as the result. The responses from the experiments of the model meet our expectation. Although the model has lots of simplifications and limitations, it can give management strategy guidance to the designers who suffer from component obsolescence problems. 

Place, publisher, year, edition, pages
Anaheim, California: IEEE conference proceedings, 2012
Keyword
model, obsolescence management, long life cycle, embedded system
National Category
Embedded Systems
Identifiers
urn:nbn:se:miun:diva-16438 (URN)10.1109/AUTEST.2012.6334547 (DOI)2-s2.0-84869792681 (Scopus ID)STC (Local ID)978-146730699-7 (ISBN)STC (Archive number)STC (OAI)
Conference
48th IEEE Systems Readiness Technology Conference, AUTOTESTCON 2012; 10-13 Sep 2012; Anaheim,USA
Note

Best student paper

Available from: 2012-06-14 Created: 2012-06-14 Last updated: 2016-10-20Bibliographically approved

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