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Pre-Processing Video Filters and Automated Implementation of Memory Architectures
Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media. (Electronics Design Division)
2005 (English)Licentiate thesis, comprehensive summary (Other academic)
Place, publisher, year, edition, pages
Sundsvall: Mittuniversitetet , 2005. , 74 p.
Series
Mid Sweden University licentiate thesis, ISSN 1652-8948 ; 4
Keyword [en]
Pre-Processing Video Implementation Memory Arhchitectures
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:miun:diva-5792Local ID: 3153ISBN: 91-85317-04-7 (print)OAI: oai:DiVA.org:miun-5792DiVA: diva2:30825
Presentation
(English)
Available from: 2008-09-30 Created: 2008-09-30 Last updated: 2009-07-10Bibliographically approved
List of papers
1. Spatio-Temporal Noise Reduction algorithm targeting Real-Time Video Processing
Open this publication in new window or tab >>Spatio-Temporal Noise Reduction algorithm targeting Real-Time Video Processing
2000 (English)In: Proceedings of IEEE International Symposium on Information Theory and Its Applications 2000, 2000Conference paper, Published paper (Refereed)
Keyword
Noise reduction Real-Time Video
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-1651 (URN)272 (Local ID)272 (Archive number)272 (OAI)
Available from: 2008-09-30 Created: 2008-09-30 Last updated: 2011-04-19Bibliographically approved
2. Cubic Vector Median Filter for Noise Reduction and Improvement of Compression Efficiency
Open this publication in new window or tab >>Cubic Vector Median Filter for Noise Reduction and Improvement of Compression Efficiency
2004 (English)In: IWSSIP'04 : international workshop on systems, signals and image processing :   ( Poznan, 13-15 September 2004 ), Poznan, Poland: Polish Society for Theoretical and Applied Electrical Engineering , 2004Conference paper, Published paper (Refereed)
Abstract [en]

Encoding of image sequences is today a standard task for computers and home entertainment systems. The input material is often of shifting quality, i.e. corrupted by noise in various ways. In order to store the information in an effective way some kind of compression has to be applied. When video compression is applied on an image sequence, the result is sub optimal due to the introduced noise variations. This paper presents a new cubic median filter suitable for pre-processing of noise contaminated video sequences. The presented approach reduces the bit usage for MPEG-2 encoding with up to 62% for impulse noise impaired sequences and 38% for the corresponding Gaussian.

Place, publisher, year, edition, pages
Poznan, Poland: Polish Society for Theoretical and Applied Electrical Engineering, 2004
Keyword
Median filter Cubic Compression
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-2356 (URN)1974 (Local ID)1974 (Archive number)1974 (OAI)
Available from: 2008-09-30 Created: 2008-09-30 Last updated: 2012-02-16Bibliographically approved
3. Automatic Hardware Synthesis of Spatial Memory Models for Real-Time Image Processing Systems
Open this publication in new window or tab >>Automatic Hardware Synthesis of Spatial Memory Models for Real-Time Image Processing Systems
2003 (English)In: Proceedings of IEEE Norchip Conference 2003: Riga, Latvia, Nov 10-11, 2003, 2003, 171-175 p.Conference paper, Published paper (Refereed)
Keyword
Hardware Synthesis Memory Models Real-Time
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-1650 (URN)271 (Local ID)87-982637-5-7 (ISBN)271 (Archive number)271 (OAI)
Available from: 2008-12-16 Created: 2008-12-16 Last updated: 2011-04-08Bibliographically approved
4. A Generalized Architecture for Hardware Synthesis of Spatio-Temporal Memory Models for Image Processing Systems
Open this publication in new window or tab >>A Generalized Architecture for Hardware Synthesis of Spatio-Temporal Memory Models for Image Processing Systems
2005 (English)In: IWSSIP 2005 - Proceedings of the 12th International Worshop on Systems, Signals & Image Processing, InderScience Publishers, 2005, 361-365 p.Conference paper, Published paper (Refereed)
Abstract [en]

This paper presents a generalized architecture for the synthesis of application specific memory architectures for real-time image processing systems. The memory generation presented in this paper can handle both spatial and spatio-temporal memory models. The results show that the architecture efficiently solves the problems related to memory accesses for most of the available video image processing filters available at present.

Place, publisher, year, edition, pages
InderScience Publishers, 2005
Keyword
FPGA, Image processing, Memory Architecture
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-3254 (URN)000234244500072 ()2-s2.0-32544451657 (Scopus ID)3214 (Local ID)0-907776-20-5 (ISBN)3214 (Archive number)3214 (OAI)
Conference
IWSSIP 2005 - 12th International Workshop on Systems, Signals and Image Processing(SSIP-SPI, 2005); Chalkida; Greece; 22 September 2005 through 24 September 2005; Code 66610
Projects
STC - Sensible Things that Communicate
Available from: 2008-09-30 Created: 2008-09-30 Last updated: 2016-09-27Bibliographically approved
5. A Comparison between Local and Global Memory Allocation for FPGA Implementation of Real-Time Video Processing Systems
Open this publication in new window or tab >>A Comparison between Local and Global Memory Allocation for FPGA Implementation of Real-Time Video Processing Systems
2004 (English)In: Proceedings of the IEEE International Conference on Signals and Electronic Systems, 2004Conference paper, Published paper (Refereed)
Abstract [en]

This paper presents a comparison of local and global memory allocation for implementation of real-time video processing systems on FPGAs. The paper compares new methods to perform memory allocation using single and dual port block RAMs to memory allocation methods found in the literature. This investigation shows that the use of global allocation can reduce the memory size by up to 75 % for the two presented video processing systems.

Keyword
FPGA, real-time video, memory allocation
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-2379 (URN)1973 (Local ID)1973 (Archive number)1973 (OAI)
Available from: 2008-09-30 Created: 2008-12-16Bibliographically approved

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