miun.sePublications
Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Substrate Noise Coupling models for Behavioral Mixed-Signal Simulation in SystemC
Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
2004 (English)In: Proceedings. 4th IEEE International Workshop on System-on-Chip for Real-Time Applications, (IWSOC'04), 2004, 2004, 201-205 p.Conference paper, (Refereed)
Abstract [en]

We present methods and models to simulate substrate noise coupling at the behavioral level. The models are implemented as a part of the SystemC based Behavioral level Noise Coupling (BeNoC) simulation application. The application is designed as a wrapper to SystemC component modules, enabling designers to simulate substrate noise coupling in their modules during the entire circuit refinement process. This is enabled through the two main contributions presented in this paper: (1) methods to connect the behavioral level with low level circuit simulations and (2) generation of a fast and accurate circuit model for substrate coupling simulations. The accuracy of the generated substrate noise coupling model is verified against device simulations. The same verification test case is used to demonstrate the connection between behavioral simulations and circuit simulations.

Place, publisher, year, edition, pages
2004. 201-205 p.
Keyword [en]
Substrate noise, models, Behavioral, Noise Coupling
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:miun:diva-3367DOI: 10.1109/IWSOC.2004.1319878Local ID: 3338OAI: oai:DiVA.org:miun-3367DiVA: diva2:28399
Available from: 2008-09-30 Created: 2008-09-30Bibliographically approved
In thesis
1. Simulating Behavioral Level On-Chip Noise Coupling
Open this publication in new window or tab >>Simulating Behavioral Level On-Chip Noise Coupling
2007 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

In this thesis, noise coupling simulation is introduced into the behavioral level. Methods andmodels for simulating on-chip noise coupling at the behavioral level in a design flow are presentedand verified for accuracy and validity. Today, designs of electronic systems are becoming denserand more and more mixed-signal systems such as System-on-Chip (SoC) are being devised. Thisraises problems when the electronics components start to interfere with each other. Often, digitalcomponents disturb analog components, introducing noise into the system causing degradation ofthe performance or even introducing errors into the functionality of the system.Today, these effects can only be simulated at a very late stage in the design process, causinglarge design iterations and increased costs if the designers are required to return and makealterations, which may have occurred at a very early stage in the process.This is why the focus of this work is centered on extracting noise coupling simulation modelsthat can be used at a very early design stage, such as at the behavioral level and then follow thedesign through the various design stages. To achieve this, SystemC is selected as a platform andimplementation example for the behavioral level models. SystemC supports design refinement,which means that when designs are being refined and are crossing the design levels, the noisecoupling models can also be refined to suit the current design.This new method of thinking in primarily mixed-signal designs is called Behavioral levelNoise Coupling (BeNoC) simulation and shows great promise in enabling a reduction in the costsof design iterations due to component cross-talk and simplifies the work for mixed-signal systemdesigners.

Abstract [sv]

I denna avhandling introduceras brussimulering i mikrochip på en beteendenivå. Metoderoch modeller för brussimulering i chip presenteras och verifieras för noggrannhet och funktionalitetpå en beteendenivå i designflödet. I dagsläget blir elektroniska system tätare och tätare på chippenoch fler och fler system görs med både analog och digital elektronik såsom System-on-Chip (SoC).Detta skapar problem när komponenter börjar störa varandra. Oftast är det digitala komponentersom stör de analoga, vilket introducerar brus i systemet som reducerar prestanda eller till och medinför fel i funktionen hos systemet.Idag kan dessa effekter simuleras i ett mycket sent skede i designflödet, betyder att om felupptäcks måste designern kanske gå tillbaka många steg i flödet. Detta kostar mycket tid ochpengar.Därför ligger fokus i detta arbete på att extrahera brussimuleringsmodeller som kananvändas i ett tidigt skede såsom på beteendenivå och sedan följa designen genom senare skeden idesignflödet. För att realisera detta har SystemC valts som en plattform och som ettimplementationsexempel för beteendenivåmodellerna. SystemC har stöd för förfining av designervilket betyder att ett system kan börja beskrivas på en hög nivå för att sedan förfinas för att nå lägrenivåer. Detta gör det möjligt för brusmodellerna att också förfinas i takt med systemdesignen.Detta nya sätt att tänka på i designprocessen av i huvudsak analog/digital-integreradesystem kallas Behavioral level Noise Coupling (BeNoC) simulering och bådar gott för att reducerakostnader för designiterationer på grund av brus mellan komponenter, och gör arbetet enklare föranalog/digital- (mixed-signal) designers.

Place, publisher, year, edition, pages
Sundsvall: Mid Sweden University, 2007. 151 p.
Series
Mid Sweden University doctoral thesis, ISSN 1652-893X ; 25
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-8057 (URN)978-91-85317-54-7 (ISBN)
Public defence
2007-05-30, O102, Holmgatan 10, Sundsvall, 10:00 (English)
Opponent
Supervisors
Available from: 2009-01-12 Created: 2009-01-07 Last updated: 2011-02-06Bibliographically approved

Open Access in DiVA

No full text

Other links

Publisher's full text

Search in DiVA

By author/editor
Lundgren, JanO'Nils, Mattias
By organisation
Department of Information Technology and Media
Electrical Engineering, Electronic Engineering, Information Engineering

Search outside of DiVA

GoogleGoogle Scholar

Altmetric score

Total: 286 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf