In this master thesis an algorithm for the allocation of on-chip FPGA Block RAMs for the implementation of a Real-Time Video Processing Systems is presented. The effectiveness of the algorithm is shown through the implementation of realistic image processing systems. The algorithm, which is based on a heuristic, seeks the most cost effective way of allocating memory objects to the FPGA Block RAMs. The experimental results obtained show that this algorithm generates results which are close to the theoretical optimum for most design cases.