Mid Sweden University

In this thesis, noise coupling simulation is introduced into the behavioral level. Methods and models for simulating on-chip noise coupling at a behavioral level in a design flow are presented and verified for accuracy and validity. Today, designs of electronic systems are becoming denser and more and more mixed-signal systems such as System-on-Chip (SoC) are being devised. This raises problems when the electronics components start to interfere with each other. Often, digital components disturb analog components, introducing noise into the system causing degradation of the performance or even introducing errors into the functionality of the system. Today, these effects can only be simulated at a very late stage in the design process, causing large design iterations and increased costs if the designers are required to return and make alterations, which may have occurred at a very early stage in the process. This is why the focus of this work is centered on extracting noise coupling simulation models that can be used at a very early design stage such as the behavioral level and then follow the design through the various design stages. To realize this, SystemC is selected as a platform and implementation example for the behavioral level models. SystemC supports design refinement, which means that when designs are being refined and are crossing the design levels, the noise coupling models can also be refined to suit the current design. This new way of thinking in primarily mixed-signal designs is called Behavioral level Noise Coupling (BeNoC) simulation and shows great promise in enabling a reduction in the costs of design iterations due to component cross-talk and simplifies the work for mixed-signal system designers.