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FPGA based architectures for embedded video systems
Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media. (STC)
2008 (English)Licentiate thesis, comprehensive summary (Other scientific)
Place, publisher, year, edition, pages
Sundsvall: Mittuniversitetet , 2008.
Series
Mid Sweden University licentiate thesis, ISSN 1652-8948 ; 30
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:miun:diva-188ISBN: 978-91-85317-87-5 (print)OAI: oai:DiVA.org:miun-188DiVA: diva2:1925
Presentation
2008-02-06, O102, Mittuniversitetet, Sundsvall, 13:15 (English)
Supervisors
Available from: 2008-03-04 Created: 2008-03-04 Last updated: 2011-02-06Bibliographically approved
List of papers
1. High Performance FPGA based Camera Architecture for Range Imaging
Open this publication in new window or tab >>High Performance FPGA based Camera Architecture for Range Imaging
2005 (English)In: 23rd NORCHIP Conference 2005, IEEE conference proceedings, 2005, 165-168 p., 1597015Conference paper, (Refereed)
Abstract [en]

Range imaging is often used in classification of objects in process industry. The speed of inspection needs to be high, so it does not become the bottleneck in the process. This paper presents an FPGA based architecture for range imaging. Using centre of gravity it calculates the range positions from 2D images. The results show that the proposed architecture can process range values with a performance up to 150 Msamples per second. Thus, using cheep standard technology we can achieve up to 3 times higher performance than expensive state-of-the-art high performance smart-cameras.

Place, publisher, year, edition, pages
IEEE conference proceedings, 2005
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-314 (URN)10.1109/NORCHP.2005.1597015 (DOI)2-s2.0-33847196083 (Scopus ID)1-4244-0064-3 (ISBN)
Conference
23rd NORCHIP Conference 2005; Oulu; Finland; 21 November 2005 through 22 November 2005
Projects
STC - Sensible Things that Communicate
Available from: 2008-03-04 Created: 2008-03-04 Last updated: 2016-10-04Bibliographically approved
2. Design Exploration of Video Pre-Processor for FPGA based SoC
Open this publication in new window or tab >>Design Exploration of Video Pre-Processor for FPGA based SoC
2006 (English)In: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Berlin: Springer Verlag , 2006, Vol. 3985, 87-92 p.Conference paper, (Refereed)
Abstract [en]

FPGA based implementation of embedded systems has many attractive characteristics such as: flexibility, low cost, high integration, embedded distributed memories and extensive parallelism. One application where there is a significant possible potential for FPGA is for the implementation of real-time video processing. In this paper we present an analysis of a video pre-processor and how this affects the FPGA and RAM resource usage and performance. From these results we indicate the best space-time mapping of operations under different design constraints. These results can be used as a decision base when implementing an FPGA based video enabled display unit.

Place, publisher, year, edition, pages
Berlin: Springer Verlag, 2006
Series
LECTURE NOTES IN COMPUTER SCIENCE, ISSN 0302-9743 ; 3985
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-315 (URN)000240036500012 ()2-s2.0-33748998178 (Scopus ID)3-540-36708-X (ISBN)978-354036708-6 (ISBN)
Conference
2nd International Workshop on Applied Reconfigurable Computing, ARC 2006; Delft; United States; 1 March 2006 through 3 March 2006
Projects
STC - Sensible Things that Communicate
Available from: 2008-03-04 Created: 2008-03-04 Last updated: 2016-09-29Bibliographically approved
3. Design and Implemetation of Video Pre-Processor for FPGA based SoC
Open this publication in new window or tab >>Design and Implemetation of Video Pre-Processor for FPGA based SoC
(English)Manuscript (Other (popular scientific, debate etc.))
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-316 (URN)
Available from: 2008-03-04 Created: 2008-03-04 Last updated: 2010-01-14Bibliographically approved
4. Low-Cost FPGA-based Display Controller Architecture with Embedded Area De-Interlacing Functionality
Open this publication in new window or tab >>Low-Cost FPGA-based Display Controller Architecture with Embedded Area De-Interlacing Functionality
(English)Manuscript (Refereed)
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-317 (URN)
Available from: 2008-03-04 Created: 2008-03-04 Last updated: 2010-01-14Bibliographically approved

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