Embedded systems with integrated sensing, processing and wireless communication are driving future connectivity concepts such as Wireless Sensor Networks (WSNs) and Internet of Things (IoTs). Because of resource limitations, there still exists a number of challenges such as low latency and energy consumption to realize these concepts to full potential. To address and understand these challenges, we have developed and employed an intelligence partitioning method which generates different implementation alternatives by distributing processing load across multiple nodes. The task-to-node mapping has exponential complexity which is hard to compute for a large scale system. Regarding this, our method provides recommendation to handle and minimize such complexity for a large system. Experiments on a use-case concludes that the proposed method is able to identify unfavourable architecture solutions in which forward and backword communication paths exists in task-to-node mapping. These solution can be avoided for further architectural exploration, thus limiting the space for architecture exploration of a sensor node.