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Hardware Architecture for Real-time  Computation of Image Component Feature Descriptors on a FPGA
Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design. (STC)
Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design. (STC)
Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design. (STC)ORCID iD: 0000-0003-1923-3843
Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design. (STC)ORCID iD: 0000-0002-3429-273X
2014 (English)In: International Journal of Distributed Sensor Networks, ISSN 1550-1329, E-ISSN 1550-1477, p. Art. no. 815378-Article in journal (Refereed) Published
Abstract [en]

This paper describes a hardwarearchitecture for real-time image component labelingand the computation of image component featuredescriptors. These descriptors are object relatedproperties used to describe each image component.Embedded machine vision systems demand a robustperformance, power efficiency as well as minimumarea utilization, depending on the deployedapplication. In the proposed architecture, the hardwaremodules for component labeling and featurecalculation run in parallel. A CMOS image sensor(MT9V032), operating at a maximum clock frequencyof 27MHz, was used to capture the images. Thearchitecture was synthesized and implemented on aXilinx Spartan-6 FPGA. The developed architecture iscapable of processing 390 video frames per second ofsize 640x480 pixels. Dynamic power consumption is13mW at 86 frames per second.

Place, publisher, year, edition, pages
2014. p. Art. no. 815378-
National Category
Electrical Engineering, Electronic Engineering, Information Engineering Embedded Systems
Identifiers
URN: urn:nbn:se:miun:diva-20382DOI: 10.1155/2014/815378ISI: 000330042300001Scopus ID: 2-s2.0-84893832573Local ID: STCOAI: oai:DiVA.org:miun-20382DiVA, id: diva2:668162
Funder
Knowledge FoundationAvailable from: 2013-11-29 Created: 2013-11-29 Last updated: 2017-12-06Bibliographically approved
In thesis
1. Real-Time Optical Position Sensing on FPGA
Open this publication in new window or tab >>Real-Time Optical Position Sensing on FPGA
2014 (English)Doctoral thesis, comprehensive summary (Other academic)
Place, publisher, year, edition, pages
Sundsvall: Mid Sweden University, 2014. p. 95
Series
Mid Sweden University doctoral thesis, ISSN 1652-893X ; 176
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-24035 (URN)STC (Local ID)978-91-87557-29-3 (ISBN)STC (Archive number)STC (OAI)
Supervisors
Available from: 2015-01-08 Created: 2015-01-07 Last updated: 2017-03-06Bibliographically approved

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Malik, Abdul WaheedThörnberg, BennyImran, MuhammadLawal, Najeem

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CiteExportLink to record
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Citation style
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