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Trade-offs for high yield in 90 nm subthreshold floating-gate circuits by Monte Carlo simulations
Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media. (Electronics design division)
Department of Informatics, University of Oslo.
2008 (English)In: Proceedings of IFIP VLSI-SOC Conference 2008: Rhodes, Greece, October 2008, 2008Conference paper, Published paper (Refereed)
Abstract [en]

The work described in this paper is performed toestimate the influence of statistical process variations andtransistor mismatch that occurs in fabrication and affectfloating-gate digital circuits. These effects will affect and reduce“yield” (percentage of fully functional circuits). Monte Carlosimulations have been performed in a 90 nm to estimate theyield for manufactured floating-gate circuits running withsubthreshold power supply. The power supply, floating-gatecharge voltage (VFGP and VFGN) and transistor sizes have beenvaried during the simulations and the yield has been observed.The simulation results shows that by doubling the minimumsize transistors (length and width) the yield can be much betterthan for minimum size version. A yield of 100% can though notbe expected if the power supply is scaled down below 250 mV.

 

Place, publisher, year, edition, pages
2008.
Keywords [en]
low power, digital CMOS, subthreshold, floating-gate design
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:miun:diva-7570OAI: oai:DiVA.org:miun-7570DiVA, id: diva2:127776
Projects
STC - Sensible Things that CommunicateAvailable from: 2009-01-07 Created: 2008-12-10 Last updated: 2010-03-16Bibliographically approved
In thesis
1. Limitations of subthreshold digital floating-gate circuits in present and future nanoscale CMOS technologies
Open this publication in new window or tab >>Limitations of subthreshold digital floating-gate circuits in present and future nanoscale CMOS technologies
2008 (English)Doctoral thesis, comprehensive summary (Other scientific)
Place, publisher, year, edition, pages
Sundsvall: Mid Sweden University, 2008. p. 129
Series
Mid Sweden University doctoral thesis, ISSN 1652-893X ; 54
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-7567 (URN)978-91-85317-97-4 (ISBN)
Public defence
(English)
Supervisors
Available from: 2008-12-10 Created: 2008-12-10 Last updated: 2011-02-06Bibliographically approved

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Alfredsson, Jon

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Output format
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