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Publications (10 of 13) Show all publications
Shahzad, K. & O'Nils, M. (2018). Condition Monitoring in Industry 4.0 - Design Challenges and Possibilities: A Case Study. In: 2018 Workshop on Metrology for Industry 4.0 and IoT, MetroInd 4.0 and IoT 2018 - Proceedings: . Paper presented at 2018 Workshop on Metrology for Industry 4.0 and IoT, MetroInd 4.0 and IoT 2018, Brescia, Italy, 16 April 2018 through 18 April 2018 (pp. 101-106). IEEE, Article ID 8428306.
Open this publication in new window or tab >>Condition Monitoring in Industry 4.0 - Design Challenges and Possibilities: A Case Study
2018 (English)In: 2018 Workshop on Metrology for Industry 4.0 and IoT, MetroInd 4.0 and IoT 2018 - Proceedings, IEEE, 2018, p. 101-106, article id 8428306Conference paper, Published paper (Refereed)
Abstract [en]

The application of IoT in manufacturing industry is believed to transform the traditional concept of factories into fully integrated manufacturing systems that are capable of meeting different requirements/demands originating within the factory, in supply chain and in user communities in a real time manner. One key area that is likely to benefit at an early stage development of the Industrial IoT is the condition monitoring of the production machinery. However, there are several challenges in realizing effective IoT enabled condition monitoring solutions with currently available enabling technologies. In this paper, we analyze the design challenges associated with realizing IoT enabled industrial condition monitoring with particular focus on enabling end-devices in managing large amount of acquired data. With the help of a vibration based condition monitoring case study the challenges are analyzed in a quantitative manner and possible alternatives are explored. The results suggest that for the efficient and long term condition monitoring in the smart industry of the future, improvements in the enabling technologies are required to design optimized end-devices. 

Place, publisher, year, edition, pages
IEEE, 2018
Keywords
Condition Monitoring, IIoT, Industrial health monitoring, Industry 4.0, IoT
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-34594 (URN)10.1109/METROI4.2018.8428306 (DOI)2-s2.0-85052495027 (Scopus ID)9781538624975 (ISBN)
Conference
2018 Workshop on Metrology for Industry 4.0 and IoT, MetroInd 4.0 and IoT 2018, Brescia, Italy, 16 April 2018 through 18 April 2018
Projects
SMART (Smarta system och tjänster för ett effektivt och innovativt samhälle)
Available from: 2018-10-03 Created: 2018-10-03 Last updated: 2019-09-09Bibliographically approved
Malik, A. W., Thörnberg, B., Anwar, Q., Johansen, T. A. & Shahzad, K. (2015). Real Time Decoding of Color Symbol for Optical Positioning System. International Journal of Advanced Robotic Systems, 12(5)
Open this publication in new window or tab >>Real Time Decoding of Color Symbol for Optical Positioning System
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2015 (English)In: International Journal of Advanced Robotic Systems, ISSN 1729-8806, E-ISSN 1729-8814, Vol. 12, no 5Article in journal (Refereed) Published
Abstract [en]

This paper presents the design and real-time decoding of a color symbol that can be used as a reference marker for optical navigation. The designed symbol has a circular shape and is printed on paper using two distinct colors. This pair of colors is selected based on the highest achievable signal to noise ratio. The symbol is designed to carry eight bit information. Real time decoding of this symbol is performed using a heterogeneous combination of Field Programmable Gate Array (FPGA) and a microcontroller.  An image sensor having a resolution of 1600 by 1200 pixels is used to capture images of symbols in complex backgrounds. Dynamic image segmentation, component labeling and feature extraction was performed on the FPGA. The region of interest was further computed from the extracted features. Feature data belonging to the symbol was sent from the FPGA to the microcontroller. Image processing tasks are partitioned between the FPGA and microcontroller based on data intensity. Experiments were performed to verify the rotational independence of the symbols. The maximum distance between camera and symbol allowing for correct detection and decoding was analyzed. Experiments were also performed to analyze the number of generated image components and sub-pixel precision versus different light sources and intensities. The proposed hardware architecture can process up to 55 frames per second for accurate detection and decoding of symbols at two Megapixels resolution. The power consumption of the complete system is 342mw.

Keywords
Indoor navigation, Reference symbol, Robotic vision
National Category
Robotics
Identifiers
urn:nbn:se:miun:diva-23168 (URN)10.5772/59680 (DOI)000350647600001 ()2-s2.0-84923346270 (Scopus ID)STC (Local ID)STC (Archive number)STC (OAI)
Funder
Knowledge Foundation
Available from: 2014-10-08 Created: 2014-10-08 Last updated: 2017-10-27Bibliographically approved
Muneer, S., Eriksson, M. & Shahzad, K. (2015). Single Frequency Network based Distributed Cooperative Routing: with CSMA MAC. In: Proceedings - 2015 13th International Conference on Frontiers of Information Technology, FIT 2015: . Paper presented at FIT 2015-I3th IEEE International Conference on Frontiers of Information Technology, 14 - 16 December (pp. 246-251). Islamabad, Article ID 7421008.
Open this publication in new window or tab >>Single Frequency Network based Distributed Cooperative Routing: with CSMA MAC
2015 (English)In: Proceedings - 2015 13th International Conference on Frontiers of Information Technology, FIT 2015, Islamabad, 2015, p. 246-251, article id 7421008Conference paper, Published paper (Refereed)
Abstract [en]

The multi-hop ad-hoc networking paradigm isexpected to be a key feature in future wireless communicationsystems. In a typical data broadcast scenario, multi-hop ad-hocrouting protocols allow devices (called nodes in this paper) tocommunicate and form networks in a manner to enable them tosuccessfully communicate and share information with all othernodes. To ensure maximum reachability in a multi-hop network,the concept of cooperative diversity, in which multiple nodescooperate to transmit the same data to a destination, can beapplied. The cooperative diversity is best exploited with the use ofSingle Frequency Networks (SFNs), also known as a form ofMacro-diversity. This work comprises of a design and analysis ofan SFN based distributed cooperative routing protocol (SFNDCRP)for multi-hop ad-hoc networks with a focus on routinginitiation phase with CSMA as a synchronization mechanism. Theproposed protocol is proactive and incurs minimum per packetdelay. The total delay in routing initiation phase for a network ofn nodes is identified as a problem of n2+2n. A delivery rate orreachability improvement of up-to 36% points for a node isobserved for the SFN based protocol as compared to a non-SFNbased protocol. For synchronization, a CSMA MAC protocol isdeployed for which a deficiency of only less than 0.1 percent existsin the measurements due to collisions in the network.

Place, publisher, year, edition, pages
Islamabad: , 2015
Keywords
Cooperative Diversity, SFN, Prowler, Multi-hop Networks, Routing, Broadcast, MAC
National Category
Communication Systems
Identifiers
urn:nbn:se:miun:diva-26961 (URN)10.1109/FIT.2015.50 (DOI)000380378000041 ()2-s2.0-84964603310 (Scopus ID)
Conference
FIT 2015-I3th IEEE International Conference on Frontiers of Information Technology, 14 - 16 December
Note

Kommer att bli tillgängligt via IEEE Explore och på http://fit.edu.pk/

Available from: 2016-02-01 Created: 2016-02-01 Last updated: 2017-10-27Bibliographically approved
Shahzad, K. & Oelmann, B. (2014). A comparative study of in-sensor processing vs. raw data transmission using ZigBee, BLE and Wi-Fi for data intensive monitoring applications. In: 2014 11th International Symposium on Wireless Communications Systems, ISWCS 2014 - Proceedings: . Paper presented at 2014 11th International Symposium on Wireless Communications Systems, ISWCS 2014, 26 August 2014 through 29 August 2014 (pp. 519-524). IEEE conference proceedings
Open this publication in new window or tab >>A comparative study of in-sensor processing vs. raw data transmission using ZigBee, BLE and Wi-Fi for data intensive monitoring applications
2014 (English)In: 2014 11th International Symposium on Wireless Communications Systems, ISWCS 2014 - Proceedings, IEEE conference proceedings, 2014, p. 519-524Conference paper, Published paper (Refereed)
Abstract [en]

Wireless sensor nodes, as typically realized using IEEE 802.15.4 compatible low-power radio transceivers that offer limited throughput, are generally applicable to low-data rate intermittent monitoring applications. In order to realize high sample rate monitoring applications, it requires either transmitting raw data using a high-throughput radio transceiver or performing computation within the sensor node and then transmitting a small amount of information. In relation to a energy constrained wireless sensing node, a quantitative evaluation of raw data transmission using different short range wireless technologies and in-sensor processing is conducted in this paper. The results, associated with the energy consumption of two data intensive monitoring applications, suggest that in-sensor processing resulting in a small amount of data to be transmitted consumes less energy as compared to that of raw data transmission, even under ideal channel conditions.

Place, publisher, year, edition, pages
IEEE conference proceedings, 2014
Keywords
BLE, Bluetooth low energy, IEEE 802.15.4, in-sensor processing, Wi-Fi, wireless sensor, ZigBee
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-24073 (URN)10.1109/ISWCS.2014.6933409 (DOI)000363906500101 ()2-s2.0-84911975363 (Scopus ID)STC (Local ID)9781479958634 (ISBN)STC (Archive number)STC (OAI)
Conference
2014 11th International Symposium on Wireless Communications Systems, ISWCS 2014, 26 August 2014 through 29 August 2014
Note

Export Date: 7 January 2015

Available from: 2015-01-08 Created: 2015-01-07 Last updated: 2017-10-27Bibliographically approved
Imran, M., Shahzad, K., Ahmad, N., O'Nils, M., Lawal, N. & Oelmann, B. (2014). Energy Efficient SRAM FPGA based Wireless Vision Sensor Node: SENTIOF‐CAM. IEEE transactions on circuits and systems for video technology (Print), 24(12), 2132-2143
Open this publication in new window or tab >>Energy Efficient SRAM FPGA based Wireless Vision Sensor Node: SENTIOF‐CAM
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2014 (English)In: IEEE transactions on circuits and systems for video technology (Print), ISSN 1051-8215, E-ISSN 1558-2205, Vol. 24, no 12, p. 2132-2143Article in journal (Refereed) Published
Abstract [en]

Many Wireless Vision Sensor Networks (WVSNs) applications are characterized to have a low duty cycling. An individual wireless Vision Senor Node (VSN) in WVSN is required to operate with limited resources i.e., processing, memory and wireless bandwidth on available limited energy. For such resource constrained VSN, this paper presents a low complexity, energy efficient and programmable VSN architecture based on a design matrix which includes partitioning of processing load between the node and a server, a low complexity background subtraction, bi-level video coding and duty cycling. The tasks partitioning and proposed background subtraction reduces the processing energy and design complexity for hardware implemented VSN. The bi-level video coding reduces the communication energy whereas the duty cycling conserves energy for lifetime maximization. The proposed VSN, referred to as SENTIOF-CAM, has been implemented on a customized single board, which includes SRAM FPGA, microcontroller, radio transceiver and a FLASH memory. The energy values are measured for different states and results are compared with existing solutions. The comparison shows that the proposed solution can offer up to 69 times energy reduction. The lifetime based on measured energy values shows that for a sample period of 5 minutes, a 3.2 years lifetime can be achieved with a battery of 37.44 kJ energy. In addition to this, the proposed solution offers generic architecture with smaller design complexity on a hardware reconfigurable platform and offers easy adaptation for a number of applications.

Keywords
Architecture, image coding, SRAM field-programmable gate array (FPGA), wireless vision sensor networks (WVSNs), wireless vision sensor node (VSN
National Category
Engineering and Technology
Identifiers
urn:nbn:se:miun:diva-21103 (URN)10.1109/TCSVT.2014.2330660 (DOI)000346150200010 ()2-s2.0-84916934186 (Scopus ID)STC (Local ID)STC (Archive number)STC (OAI)
Available from: 2014-01-21 Created: 2014-01-21 Last updated: 2017-10-27Bibliographically approved
Shahzad, K. (2014). Energy Efficient Wireless Sensor Node Architecture for Data and Computation Intensive Applications. (Doctoral dissertation). Sundsvall, Sweden: Mid Sweden University
Open this publication in new window or tab >>Energy Efficient Wireless Sensor Node Architecture for Data and Computation Intensive Applications
2014 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

Wireless Sensor Networks (WSNs), in addition to enabling monitoring solutions for numerous new applications areas, have gained huge popularity as a cost-effective, dynamically scalable, easy to deploy and maintainable alternatives to conventional infrastructure-based monitoring solutions.

A WSN consists of spatially distributed autonomous wireless sensor nodes that measure desired physical phenomena and operate in a collaborative manner to relay the acquired information wirelessly to a central location. A wireless sensor node, integrating the required resources to enable infrastructure-less distributed monitoring, is constrained by its size, cost and energy. In order to address these constraints, a typical wireless sensor node is designed based on low-power and low-cost modules that in turn provide limited communication and processing performances. Data and computation intensive wireless monitoring applications, on the other hand, not only demand higher communication bandwidth and computational performance but also require practically feasible operational lifetimes so as to reduce the maintenance cost associated with the replacement of batteries. In relation to the communication and processing requirements of such applications and the constraints associated with a typical wireless sensor node, this thesis explores energy efficient wireless sensor node architecture that enables realization of data and computation intensive applications.

Architectures enabling raw data transmission and in-sensor processing with various technological alternatives are explored. The potential architectural alternatives are evaluated both analytically and quantitatively with regards to different design parameters, in particular, the performance and the energy consumption. For quantitative evaluation purposes, the experiments are conducted on vibration and image-based industrial condition monitoring applications that are not only data and computation intensive but also are of practical importance.

Regarding the choice of an appropriate wireless technology in an architecture enabling raw data transmission, standard based communication technologies including infrared, mobile broadband, WiMax, LAN, Bluetooth, and ZigBee are investigated. With regards to in-sensor processing, different architectures comprising of sequential processors and FPGAs are realized to evaluate different design parameters, especially the performance and energy efficiency. Afterwards, the architectures enabling raw data transmission only and those involving in-sensor processing are evaluated so as to find an energy efficient solution. The results of this investigation show that in-sensor processing architecture, comprising of an FPGA for computation purposes, is more energy efficient when compared with other alternatives in relation to the data and computation intensive applications.

Based on the results obtained and the experiences learned in the architectural evaluation study, an FPGA-based high-performance wireless sensor platform, the SENTIOF, is designed and developed. In addition to performance, the SETNIOF is designed to enable dynamic optimization of energy consumption. This includes enabling integrated modules to be completely switched-off and providing a fast configuration support to the FPGA.

 In order to validate the results of the evaluation studies, and to assess the performance and energy consumption of real implementations, both the vibration and image-based industrial monitoring applications are realized using the SENTIOF. In terms of computational performance for both of these applications, the real-time processing goals are achieved. For example, in the case of vibration-based monitoring, real-time processing performance for tri-axes (horizontal, vertical and axial) vibration data are achieved for sampling rates of more than 100 kHz.

With regards to energy consumption, based on the measured power consumption that also includes the power consumed during the FPGA’s configuration process, the operational lifetimes are estimated using a single cell battery (similar to an AA battery in terms of shape and size) with a typical capacity of 2600 mA. In the case of vibration-based condition monitoring, an operational lifetime of more than two years can be achieved for duty-cycle interval of 10 minutes or more. The achievable operational lifetime of image-based monitoring is more than 3 years for a duty-cycle interval of 5 minutes or more. 

Place, publisher, year, edition, pages
Sundsvall, Sweden: Mid Sweden University, 2014. p. 112
Series
Mid Sweden University doctoral thesis, ISSN 1652-893X ; 192
Keywords
WSN, wireless sensor node, architecture, vibration monitoring, image monitoring, energy efficient, FPGA, power management, embedded system
National Category
Engineering and Technology
Identifiers
urn:nbn:se:miun:diva-21956 (URN)978-91-87557-64-4 (ISBN)
Public defence
2014-06-11, M102, Sundsvall, 10:15 (English)
Opponent
Supervisors
Available from: 2014-05-26 Created: 2014-05-24 Last updated: 2017-10-27Bibliographically approved
Shahzad, K. & Oelmann, B. (2014). Investigating Energy Consumption of an SRAM-based FPGA for Duty-Cycle Applications. In: Advances in parallel computing: . Paper presented at International Conference on Parallel Computing - ParCo 2013, 10-13 Sept, Munich (pp. 548-559).
Open this publication in new window or tab >>Investigating Energy Consumption of an SRAM-based FPGA for Duty-Cycle Applications
2014 (English)In: Advances in parallel computing, 2014, p. 548-559Conference paper, Published paper (Refereed)
Abstract [en]

In order to conserve energy, battery powered embedded systems are typically designed with very low-power modules that offer limited computational power and communication bandwidth and therefore, are generally applicable to low-sample-rate intermittent applications. On the other hand, enabling an embedded system with a high-throughput processing resource such as an FPGA, high-throughput processing performance that is typically required in high-sample rate monitoring applications can be achieved. However, the high power consumption associated with an FPGA poses a major challenge in attaining significant lifetime for a battery-powered embedded system. In this paper, we investigate energy consumption of an SRAM-based FPGA in relation to duty-cycle applications. In order to achieve long operational lifetime in an FPGA-based embedded system, the possible options to dynamically manage the power consumption are studied and discussed. The experimental results suggest that the SRAM-based FPGA, XC6SLX16 that provides ample logic resources in relation to typical high-sample rate monitoring applications, can be used in a battery operated embedded systems while minimizing the energy consumption to 2.56 mJ for inactive duration of 235 ms or above.

Keywords
Energy optimization; SRAM-based FPGA; High-sample rate; Dynamic power management; Duty-cycling
National Category
Engineering and Technology
Identifiers
urn:nbn:se:miun:diva-21093 (URN)10.3233/978-1-61499-381-0-548 (DOI)2-s2.0-84902282682 (Scopus ID)STC (Local ID)978-1-61499-380-3 (ISBN)STC (Archive number)STC (OAI)
Conference
International Conference on Parallel Computing - ParCo 2013, 10-13 Sept, Munich
Available from: 2014-01-21 Created: 2014-01-21 Last updated: 2017-10-27Bibliographically approved
Shahzad, K. & Oelmann, B. (2014). Quantitative Evaluation of an FPGA based Wireless Vibration Monitoring System in relation to Different Sampling Rates. In: Proceedings of the International Conference on Sensing Technology, ICST: . Paper presented at 8th International Conference on Sensing Technology, ICST 2014; Liverpool; United Kingdom; 2 September 2014 through 4 September 2014 (pp. 510-516). IEEE Computer Society, 2014
Open this publication in new window or tab >>Quantitative Evaluation of an FPGA based Wireless Vibration Monitoring System in relation to Different Sampling Rates
2014 (English)In: Proceedings of the International Conference on Sensing Technology, ICST, IEEE Computer Society, 2014, Vol. 2014, p. 510-516Conference paper, Published paper (Refereed)
Abstract [en]

In order to achieve the high-processing performance  required in typical computationally intensive high-sample rate monitoring applications, a Field Programmable Gate Array (FPGA) is often used as a hardware accelerator.  Given the design complexity, increased power consumption and additional cost of an FPGA, it is desirable to determine the sampling rates for which the use of an FPGA as hardware accelerator results in most effective solution. For this purpose, a computationally intensive application is realized on an FPGA based architecture so as to determine the sampling rates for which it achieves the highest performance and consumes the least amount of energy as compared to that of a micro-controller based architecture. Based on the measured performance and energy consumption for a computationally intensive application, tri-axes/three-channel vibration based condition monitoring, the results suggest that the FPGA based architecture is the most appropriate solution for sampling frequencies of 4 kHz and above.

Place, publisher, year, edition, pages
IEEE Computer Society, 2014
Keywords
wireless monitoring, FPGA, sampling rate, high-sample rate, energy consumption, hardware accelerator
National Category
Engineering and Technology
Identifiers
urn:nbn:se:miun:diva-21098 (URN)2-s2.0-84978516362 (Scopus ID)
Conference
8th International Conference on Sensing Technology, ICST 2014; Liverpool; United Kingdom; 2 September 2014 through 4 September 2014
Available from: 2014-01-21 Created: 2014-01-21 Last updated: 2017-10-27Bibliographically approved
Shahzad, K. & Oelmann, B. (2013). An FPGA-Based High-Performance Wireless Vibration Analyzer. In: NORCHIP 2013: . Paper presented at NORCHIP 2013; Vilnius; Lithuania; 11 November 2013 through 12 November 2013; Category numberCFP13828-ART; Code 102495 (pp. Art. no. 6702038).
Open this publication in new window or tab >>An FPGA-Based High-Performance Wireless Vibration Analyzer
2013 (English)In: NORCHIP 2013, 2013, p. Art. no. 6702038-Conference paper, Published paper (Refereed)
Abstract [en]

In this article, an Field Programmable Gate Array (FPGA) based high-performance wireless vibration analyzer that performs high sample rate tri-axes (horizontal, vertical, and axial) vibration monitoring and analysis, is presented. The custom designed compact size wireless analyzer can be mounted on difficult to access as well as rotating parts of the machinery so as to perform vibration based condition monitoring. Based on the measured performance and power consumption, the analyzer not only achieves the performance goals for high-sample rate (i.e. at 50 kHz) tri-axes vibration data processing but, also achieves operational lifetime of more than three years for duty-cycle durations of more than 4 hours.

Keywords
wireless vibration analyzer, FPGA, local processing, high-sample rate, high-performance, low-power
National Category
Engineering and Technology
Identifiers
urn:nbn:se:miun:diva-21095 (URN)10.1109/NORCHIP.2013.6702038 (DOI)000345902700042 ()2-s2.0-84893632589 (Scopus ID)978-1-4799-1647-4 (ISBN)
Conference
NORCHIP 2013; Vilnius; Lithuania; 11 November 2013 through 12 November 2013; Category numberCFP13828-ART; Code 102495
Available from: 2014-01-21 Created: 2014-01-21 Last updated: 2017-10-27Bibliographically approved
Shahzad, K., Cheng, P. & Oelmann, B. (2013). Architecture exploration for a high-performance and low-power wireless vibration analyzer. IEEE Sensors Journal, 13(2), 670-682
Open this publication in new window or tab >>Architecture exploration for a high-performance and low-power wireless vibration analyzer
2013 (English)In: IEEE Sensors Journal, ISSN 1530-437X, E-ISSN 1558-1748, Vol. 13, no 2, p. 670-682Article in journal (Refereed) Published
Abstract [en]

Vibration based condition monitoring is considered to be the most effective method for analyzing the performance of rotating machinery and for early fault detection. Traditional vibration analyzers used for this purpose provide wired interface(s) to connect sensors with the system that analyzes the vibration data. A wireless vibration analyzer can be useful to monitor and analyze the vibration of rotating as well as inaccessible parts of the machinery. However, for a wireless vibration analyzer, both the performance and power consumption are of major concern, especially for real-time tri-axes (horizontal, vertical, and axial) vibration data processing and analyses at a high sampling rate. To evaluate the performance of such an analyzer, we explore different architectures in order to realize a high-performance and low-power wireless vibration analyzer that can be used in addition to traditional analyzers. For this purpose, four different architectures have been implemented in order to evaluate them in terms of performance, power consumption, cost, and design complexity.

Keywords
Field programmable gate array (FPGA) and micro-controller based analyzer; hardware architecture; low-power analyzer; wireless vibration monitoring
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-17892 (URN)10.1109/JSEN.2012.2226238 (DOI)000313876800008 ()2-s2.0-84873170342 (Scopus ID)STC (Local ID)STC (Archive number)STC (OAI)
Note

Published online: 24 October 2012

Available from: 2012-12-18 Created: 2012-12-18 Last updated: 2017-10-27Bibliographically approved
Organisations
Identifiers
ORCID iD: ORCID iD iconorcid.org/0000-0002-3493-7016

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