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Lepistö, Niklas
Publikationer (7 of 7) Visa alla publikationer
Lepistö, N. & O'Nils, M. (2008). Design and Implementation of Video Pre-Processor for FPGA based SoC. In: : .
Öppna denna publikation i ny flik eller fönster >>Design and Implementation of Video Pre-Processor for FPGA based SoC
2008 (Engelska)Konferensbidrag, Publicerat paper (Refereegranskat)
Abstract [en]

FPGA based implementation of embedded systems has many attractive characteristics such as: flexibility, low cost, high integration, embedded distributed memories and ex-tensive parallelism. Real-time video processing is an ap-plication area where FPGA based implementations have significant potential. This paper presents the design and implementation of a video pre-processor suitable for use in embedded display applications. Some of the key functions of the pre-processor are cropping and scaling of input video frames and the possibility to use multiple pre-processors in parallel to provide multiple video streams to a display unit

Nyckelord
FPGA, real-time video processing
Nationell ämneskategori
Elektroteknik och elektronik
Identifikatorer
urn:nbn:se:miun:diva-6483 (URN)5217 (Lokalt ID)5217 (Arkivnummer)5217 (OAI)
Tillgänglig från: 2009-03-24 Skapad: 2009-03-24Bibliografiskt granskad
Lepistö, N. (2008). FPGA based architectures for embedded video systems. (Licentiate dissertation). Sundsvall: Mittuniversitetet
Öppna denna publikation i ny flik eller fönster >>FPGA based architectures for embedded video systems
2008 (Engelska)Licentiatavhandling, sammanläggning (Övrigt vetenskapligt)
Ort, förlag, år, upplaga, sidor
Sundsvall: Mittuniversitetet, 2008
Serie
Mid Sweden University licentiate thesis, ISSN 1652-8948 ; 30
Nationell ämneskategori
Elektroteknik och elektronik
Identifikatorer
urn:nbn:se:miun:diva-188 (URN)978-91-85317-87-5 (ISBN)
Presentation
2008-02-06, O102, Mittuniversitetet, Sundsvall, 13:15 (Engelska)
Handledare
Tillgänglig från: 2008-03-04 Skapad: 2008-03-04 Senast uppdaterad: 2011-02-06Bibliografiskt granskad
Lepistö, N., Thörnberg, B. & O'Nils, M. (2006). Design Exploration of Video Pre-Processor for FPGA based SoC. In: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics): . Paper presented at 2nd International Workshop on Applied Reconfigurable Computing, ARC 2006; Delft; United States; 1 March 2006 through 3 March 2006 (pp. 87-92). Berlin: Springer Verlag, 3985
Öppna denna publikation i ny flik eller fönster >>Design Exploration of Video Pre-Processor for FPGA based SoC
2006 (Engelska)Ingår i: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Berlin: Springer Verlag , 2006, Vol. 3985, s. 87-92Konferensbidrag, Publicerat paper (Refereegranskat)
Abstract [en]

FPGA based implementation of embedded systems has many attractive characteristics such as: flexibility, low cost, high integration, embedded distributed memories and extensive parallelism. One application where there is a significant possible potential for FPGA is for the implementation of real-time video processing. In this paper we present an analysis of a video pre-processor and how this affects the FPGA and RAM resource usage and performance. From these results we indicate the best space-time mapping of operations under different design constraints. These results can be used as a decision base when implementing an FPGA based video enabled display unit.

Ort, förlag, år, upplaga, sidor
Berlin: Springer Verlag, 2006
Serie
LECTURE NOTES IN COMPUTER SCIENCE, ISSN 0302-9743 ; 3985
Nationell ämneskategori
Elektroteknik och elektronik
Identifikatorer
urn:nbn:se:miun:diva-315 (URN)000240036500012 ()2-s2.0-33748998178 (Scopus ID)3-540-36708-X (ISBN)978-354036708-6 (ISBN)
Konferens
2nd International Workshop on Applied Reconfigurable Computing, ARC 2006; Delft; United States; 1 March 2006 through 3 March 2006
Projekt
STC - Sensible Things that Communicate
Tillgänglig från: 2008-03-04 Skapad: 2008-03-04 Senast uppdaterad: 2016-09-29Bibliografiskt granskad
Lepistö, N., Thörnberg, B. & O'Nils, M. (2005). High Performance FPGA based Camera Architecture for Range Imaging. In: 23rd NORCHIP Conference 2005: . Paper presented at 23rd NORCHIP Conference 2005; Oulu; Finland; 21 November 2005 through 22 November 2005 (pp. 165-168). IEEE conference proceedings, Article ID 1597015.
Öppna denna publikation i ny flik eller fönster >>High Performance FPGA based Camera Architecture for Range Imaging
2005 (Engelska)Ingår i: 23rd NORCHIP Conference 2005, IEEE conference proceedings, 2005, s. 165-168, artikel-id 1597015Konferensbidrag, Publicerat paper (Refereegranskat)
Abstract [en]

Range imaging is often used in classification of objects in process industry. The speed of inspection needs to be high, so it does not become the bottleneck in the process. This paper presents an FPGA based architecture for range imaging. Using centre of gravity it calculates the range positions from 2D images. The results show that the proposed architecture can process range values with a performance up to 150 Msamples per second. Thus, using cheep standard technology we can achieve up to 3 times higher performance than expensive state-of-the-art high performance smart-cameras.

Ort, förlag, år, upplaga, sidor
IEEE conference proceedings, 2005
Nationell ämneskategori
Elektroteknik och elektronik
Identifikatorer
urn:nbn:se:miun:diva-314 (URN)10.1109/NORCHP.2005.1597015 (DOI)2-s2.0-33847196083 (Scopus ID)1-4244-0064-3 (ISBN)
Konferens
23rd NORCHIP Conference 2005; Oulu; Finland; 21 November 2005 through 22 November 2005
Projekt
STC - Sensible Things that Communicate
Tillgänglig från: 2008-03-04 Skapad: 2008-03-04 Senast uppdaterad: 2016-10-04Bibliografiskt granskad
Lepistö, N. (2004). Integration of industrial systems on FPGAs - Handling of communication in a reconfigurable system.
Öppna denna publikation i ny flik eller fönster >>Integration of industrial systems on FPGAs - Handling of communication in a reconfigurable system
2004 (Engelska)Rapport (Övrigt vetenskapligt)
Abstract [en]

The production of embedded industrial systems can often be made more profitable by designing systems that are flexible. In this way a specific system can be marketed to a large number of customers with different requirements. During the last few years new advances in semiconductor production technology and an increasing market for configurable logic has made it possible to use FPGA based designs in situations where it has earlier been uneconomical. This thesis evaluates the possibility to use FPGA based communication devices to increase the flexibility of a system. As a part of this evaluation an existing design has been implemented in an FPGA to investigate the possibilities and advantages of an FPGA based solution. The goal was to design a test system and implement a UART and CAN-controller in an FPGA. The FPGA designs have been based on existing open source IP-cores. The work has resulted in a functioning UART implementation an a CAN-controller implementation with only parts of the intended functionality, the test system that was designed contains some errors that need to be fixed for further development to be possible. This thesis has been a part of a larger project that also has targeted the implementation of other functionality than that described in this document. Some of the tasks described have been carried out as a joint effort between the involved parties.

Nyckelord
FPGA Embedded Communication CAN
Nationell ämneskategori
Elektroteknik och elektronik
Identifikatorer
urn:nbn:se:miun:diva-6232 (URN)3455 (Lokalt ID)3455 (Arkivnummer)3455 (OAI)
Tillgänglig från: 2009-02-23 Skapad: 2009-02-23Bibliografiskt granskad
Lepistö, N. & O'Nils, M.Design and Implemetation of Video Pre-Processor for FPGA based SoC.
Öppna denna publikation i ny flik eller fönster >>Design and Implemetation of Video Pre-Processor for FPGA based SoC
(Engelska)Manuskript (Övrig (populärvetenskap, debatt))
Nationell ämneskategori
Elektroteknik och elektronik
Identifikatorer
urn:nbn:se:miun:diva-316 (URN)
Tillgänglig från: 2008-03-04 Skapad: 2008-03-04 Senast uppdaterad: 2010-01-14Bibliografiskt granskad
Lepistö, N. & O'Nils, M.Low-Cost FPGA-based Display Controller Architecture with Embedded Area De-Interlacing Functionality.
Öppna denna publikation i ny flik eller fönster >>Low-Cost FPGA-based Display Controller Architecture with Embedded Area De-Interlacing Functionality
(Engelska)Manuskript (Refereegranskat)
Nationell ämneskategori
Elektroteknik och elektronik
Identifikatorer
urn:nbn:se:miun:diva-317 (URN)
Tillgänglig från: 2008-03-04 Skapad: 2008-03-04 Senast uppdaterad: 2010-01-14Bibliografiskt granskad
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